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padds{b|w}, paddus{b|w}, psubs{b|w}, psubus{b|w} intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27639 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
parent
a50a086341
commit
49ac1bf1c4
@ -250,6 +250,34 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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llvm_v2f64_ty], [IntrNoMem]>;
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}
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// Integer arithmetic ops.
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_sse2_padds_b : GCCBuiltin<"__builtin_ia32_paddsb128">,
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Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
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llvm_v16i8_ty], [IntrNoMem]>;
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def int_x86_sse2_padds_w : GCCBuiltin<"__builtin_ia32_paddsw128">,
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Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
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llvm_v8i16_ty], [IntrNoMem]>;
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def int_x86_sse2_paddus_b : GCCBuiltin<"__builtin_ia32_paddusb128">,
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Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
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llvm_v16i8_ty], [IntrNoMem]>;
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def int_x86_sse2_paddus_w : GCCBuiltin<"__builtin_ia32_paddusw128">,
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Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
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llvm_v8i16_ty], [IntrNoMem]>;
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def int_x86_sse2_psubs_b : GCCBuiltin<"__builtin_ia32_psubsb128">,
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Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
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llvm_v16i8_ty], [IntrNoMem]>;
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def int_x86_sse2_psubs_w : GCCBuiltin<"__builtin_ia32_psubsw128">,
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Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
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llvm_v8i16_ty], [IntrNoMem]>;
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def int_x86_sse2_psubus_b : GCCBuiltin<"__builtin_ia32_psubusb128">,
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Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
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llvm_v16i8_ty], [IntrNoMem]>;
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def int_x86_sse2_psubus_w : GCCBuiltin<"__builtin_ia32_psubusw128">,
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Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
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llvm_v8i16_ty], [IntrNoMem]>;
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}
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// Integer shift ops.
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_sse2_psll_dq : GCCBuiltin<"__builtin_ia32_pslldqi128">,
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@ -1283,23 +1283,59 @@ def PADDQrr : PDI<0xD4, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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"paddq {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (v2i64 (add VR128:$src1, VR128:$src2)))]>;
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}
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def PADDBrm : PDI<0xFC, MRMSrcMem, (ops VR128:$dst, VR128:$src1, f128mem:$src2),
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def PADDBrm : PDI<0xFC, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"paddb {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (v16i8 (add VR128:$src1,
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(load addr:$src2))))]>;
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def PADDWrm : PDI<0xFD, MRMSrcMem, (ops VR128:$dst, VR128:$src1, f128mem:$src2),
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def PADDWrm : PDI<0xFD, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"paddw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (v8i16 (add VR128:$src1,
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(load addr:$src2))))]>;
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def PADDDrm : PDI<0xFE, MRMSrcMem, (ops VR128:$dst, VR128:$src1, f128mem:$src2),
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def PADDDrm : PDI<0xFE, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"paddd {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (v4i32 (add VR128:$src1,
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(load addr:$src2))))]>;
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def PADDQrm : PDI<0xD4, MRMSrcMem, (ops VR128:$dst, VR128:$src1, f128mem:$src2),
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def PADDQrm : PDI<0xD4, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"paddd {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (v2i64 (add VR128:$src1,
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(load addr:$src2))))]>;
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let isCommutable = 1 in {
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def PADDSBrr : PDI<0xEC, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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"paddsb {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_padds_b VR128:$src1,
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VR128:$src2))]>;
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def PADDSWrr : PDI<0xED, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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"paddsw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_padds_w VR128:$src1,
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VR128:$src2))]>;
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def PADDUSBrr : PDI<0xDC, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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"paddusb {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_paddus_b VR128:$src1,
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VR128:$src2))]>;
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def PADDUSWrr : PDI<0xDD, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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"paddusw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_paddus_w VR128:$src1,
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VR128:$src2))]>;
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}
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def PADDSBrm : PDI<0xEC, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"paddsb {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_padds_b VR128:$src1,
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(bc_v16i8 (loadv2i64 addr:$src2))))]>;
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def PADDSWrm : PDI<0xED, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"paddsw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_padds_w VR128:$src1,
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(bc_v8i16 (loadv2i64 addr:$src2))))]>;
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def PADDUSBrm : PDI<0xDC, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"paddusb {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_paddus_b VR128:$src1,
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(bc_v16i8 (loadv2i64 addr:$src2))))]>;
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def PADDUSWrm : PDI<0xDD, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"paddusw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_paddus_w VR128:$src1,
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(bc_v8i16 (loadv2i64 addr:$src2))))]>;
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def PSUBBrr : PDI<0xF8, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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"psubb {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (v16i8 (sub VR128:$src1, VR128:$src2)))]>;
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@ -1313,22 +1349,56 @@ def PSUBQrr : PDI<0xFB, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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"psubq {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (v2i64 (sub VR128:$src1, VR128:$src2)))]>;
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def PSUBBrm : PDI<0xF8, MRMSrcMem, (ops VR128:$dst, VR128:$src1, f128mem:$src2),
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def PSUBBrm : PDI<0xF8, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"psubb {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (v16i8 (sub VR128:$src1,
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(load addr:$src2))))]>;
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def PSUBWrm : PDI<0xF9, MRMSrcMem, (ops VR128:$dst, VR128:$src1, f128mem:$src2),
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def PSUBWrm : PDI<0xF9, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"psubw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (v8i16 (sub VR128:$src1,
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(load addr:$src2))))]>;
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def PSUBDrm : PDI<0xFA, MRMSrcMem, (ops VR128:$dst, VR128:$src1, f128mem:$src2),
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def PSUBDrm : PDI<0xFA, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"psubd {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (v4i32 (sub VR128:$src1,
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(load addr:$src2))))]>;
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def PSUBQrm : PDI<0xFB, MRMSrcMem, (ops VR128:$dst, VR128:$src1, f128mem:$src2),
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def PSUBQrm : PDI<0xFB, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"psubd {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (v2i64 (sub VR128:$src1,
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(load addr:$src2))))]>;
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def PSUBSBrr : PDI<0xE8, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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"psubsb {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psubs_b VR128:$src1,
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VR128:$src2))]>;
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def PSUBSWrr : PDI<0xE9, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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"psubsw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psubs_w VR128:$src1,
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VR128:$src2))]>;
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def PSUBUSBrr : PDI<0xD8, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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"psubusb {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psubus_b VR128:$src1,
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VR128:$src2))]>;
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def PSUBUSWrr : PDI<0xD9, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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"psubusw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psubus_w VR128:$src1,
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VR128:$src2))]>;
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def PSUBSBrm : PDI<0xE8, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"psubsb {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psubs_b VR128:$src1,
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(bc_v16i8 (loadv2i64 addr:$src2))))]>;
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def PSUBSWrm : PDI<0xE9, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"psubsw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psubs_w VR128:$src1,
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(bc_v8i16 (loadv2i64 addr:$src2))))]>;
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def PSUBUSBrm : PDI<0xD8, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"psubusb {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psubus_b VR128:$src1,
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(bc_v16i8 (loadv2i64 addr:$src2))))]>;
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def PSUBUSWrm : PDI<0xD9, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"psubusw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psubus_w VR128:$src1,
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(bc_v8i16 (loadv2i64 addr:$src2))))]>;
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}
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let isTwoAddress = 1 in {
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