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Reapply coalescer fix for better cross-class coalescing.

Browse Source 
This time with fixed test cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95938 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2010-02-11 23:55:29 +00:00
parent 0d7b0aa760
commit 4a540f0593
7 changed files with 8 additions and 10 deletions
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2
lib/CodeGen/SimpleRegisterCoalescing.cpp
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@ -1148,7 +1148,7 @@ SimpleRegisterCoalescing::isWinToJoinCrossClass(unsigned LargeReg,
LiveInterval &SmallInt = li_->getInterval(SmallReg);
unsigned LargeSize = li_->getApproximateInstructionCount(LargeInt);
unsigned SmallSize = li_->getApproximateInstructionCount(SmallInt);
if (SmallSize > Threshold || LargeSize > Threshold) {
if (LargeSize > Threshold) {
unsigned SmallUses = std::distance(mri_->use_nodbg_begin(SmallReg),
mri_->use_nodbg_end());
unsigned LargeUses = std::distance(mri_->use_nodbg_begin(LargeReg),

2
test/CodeGen/Thumb2/cross-rc-coalescing-2.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mcpu=cortex-a8 | grep vmov.f32 | count 7
; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mcpu=cortex-a8 | grep vmov.f32 | count 3
define arm_apcscc void @fht(float* nocapture %fz, i16 signext %n) nounwind {
entry:

4
test/CodeGen/X86/2008-07-11-SpillerBug.ll
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@ -1,9 +1,7 @@
; RUN: llc < %s -march=x86 -relocation-model=static -disable-fp-elim -post-RA-scheduler=false -asm-verbose=0 | FileCheck %s
; PR2536
; CHECK: movw %cx
; CHECK-NEXT: andl $65534, %
; CHECK: andl $65534, %
; CHECK-NEXT: movl %
; CHECK-NEXT: movl $17

4
test/CodeGen/X86/pr1505b.ll
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@ -1,5 +1,5 @@
; RUN: llc < %s -mcpu=i486 | grep fstpl | count 4
; RUN: llc < %s -mcpu=i486 | grep fstps | count 3
; RUN: llc < %s -mcpu=i486 | grep fstpl | count 5
; RUN: llc < %s -mcpu=i486 | grep fstps | count 2
; PR1505
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"

2
test/CodeGen/X86/pr3495.ll
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@ -1,6 +1,6 @@
; RUN: llc < %s -march=x86 -stats |& grep {Number of loads added} | grep 2
; RUN: llc < %s -march=x86 -stats |& grep {Number of register spills} | grep 1
; RUN: llc < %s -march=x86 -stats |& grep {Number of machine instrs printed} | grep 38
; RUN: llc < %s -march=x86 -stats |& grep {Number of machine instrs printed} | grep 37
; PR3495
; The loop reversal kicks in once here, resulting in one fewer instruction.

2
test/CodeGen/X86/stack-color-with-reg.ll
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@ -1,5 +1,5 @@
; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -relocation-model=pic -disable-fp-elim -color-ss-with-regs -stats -info-output-file - > %t
; RUN: grep stackcoloring %t | grep "stack slot refs replaced with reg refs" | grep 14
; RUN: grep stackcoloring %t | grep "stack slot refs replaced with reg refs" | grep 8
type { [62 x %struct.Bitvec*] } ; type %0
type { i8* } ; type %1

2
test/CodeGen/X86/twoaddr-coalesce.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=x86 | grep mov | count 5
; RUN: llc < %s -march=x86 | grep mov | count 4
; rdar://6523745
@"\01LC" = internal constant [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1]