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Remove OptimizeForSize global. Use function attribute optsize.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56937 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Devang Patel 2008-10-01 23:18:38 +00:00
parent dc756858f9
commit 4ae641f4d1
10 changed files with 26 additions and 16 deletions
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4
include/llvm/Target/TargetOptions.h
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@ -83,10 +83,6 @@ namespace llvm {
/// optimization (pop the caller's stack) providing it supports it.
extern bool PerformTailCallOpt;
/// OptimizeForSize - When this flag is set, the code generator avoids
/// optimizations that increase size.
extern bool OptimizeForSize;
/// StackAlignment - Override default stack alignment for target.
extern unsigned StackAlignment;

2
lib/CodeGen/LLVMTargetMachine.cpp
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@ -81,7 +81,7 @@ LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
if (addPreEmitPass(PM, Fast) && PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(cerr));
if (!Fast && !OptimizeForSize)
if (!Fast)
PM.add(createLoopAlignerPass());
switch (FileType) {

4
lib/CodeGen/LoopAligner.cpp
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@ -58,6 +58,10 @@ bool LoopAligner::runOnMachineFunction(MachineFunction &MF) {
if (!Align)
return false; // Don't care about loop alignment.
const Function *F = MF.getFunction();
if (!F->isDeclaration() && F->hasFnAttr(Attribute::OptimizeForSize))
return false;
for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) {
MachineBasicBlock *MBB = I;
if (MLI->isLoopHeader(MBB))

2
lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
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@ -776,7 +776,7 @@ bool PPCDarwinAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
printVisibility(CurrentFnName, F->getVisibility());
EmitAlignment(OptimizeForSize ? 2 : 4, F);
EmitAlignment(F->hasFnAttr(Attribute::OptimizeForSize) ? 2 : 4, F);
O << CurrentFnName << ":\n";
// Emit pre-function debug information.

6
lib/Target/TargetMachine.cpp
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@ -35,7 +35,6 @@ namespace llvm {
Reloc::Model RelocationModel;
CodeModel::Model CMModel;
bool PerformTailCallOpt;
bool OptimizeForSize;
unsigned StackAlignment;
bool RealignStack;
bool VerboseAsm;
@ -134,11 +133,6 @@ EnablePerformTailCallOpt("tailcallopt",
cl::desc("Turn on tail call optimization."),
cl::location(PerformTailCallOpt),
cl::init(false));
static cl::opt<bool, true>
EnableOptimizeForSize("optimize-size",
cl::desc("Optimize for size."),
cl::location(OptimizeForSize),
cl::init(false));
static cl::opt<unsigned, true>
OverrideStackAlignment("stack-alignment",

2
lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp
View File

@ -153,7 +153,7 @@ void X86ATTAsmPrinter::emitFunctionHeader(const MachineFunction &MF) {
SwitchToSection(TAI->SectionForGlobal(F));
unsigned FnAlign = OptimizeForSize ? 1 : 4;
unsigned FnAlign = 4;
if (!F->isDeclaration() && F->hasFnAttr(Attribute::OptimizeForSize))
FnAlign = 1;
switch (F->getLinkage()) {

2
lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp
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@ -140,7 +140,7 @@ bool X86IntelAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
SwitchToTextSection("_text", F);
unsigned FnAlign = OptimizeForSize ? 1 : 4;
unsigned FnAlign = 4;
if (!F->isDeclaration() && F->hasFnAttr(Attribute::OptimizeForSize))
FnAlign = 1;
switch (F->getLinkage()) {

2
lib/Target/X86/X86ISelDAGToDAG.cpp
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@ -137,7 +137,7 @@ namespace {
ContainsFPCode(false), TM(tm),
X86Lowering(*TM.getTargetLowering()),
Subtarget(&TM.getSubtarget<X86Subtarget>()),
OptForSize(OptimizeForSize) {}
OptForSize(false) {}
virtual const char *getPassName() const {
return "X86 DAG->DAG Instruction Selection";

1
test/CodeGen/X86/vec_shuffle-23.ll
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@ -1,6 +1,5 @@
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep punpck
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep pshufd
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -optimize-size | grep punpck
define i32 @t() nounwind {
entry:

17
test/CodeGen/X86/vec_shuffle-24.ll Normal file
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@ -0,0 +1,17 @@
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep punpck
define i32 @t() nounwind optsize {
entry:
%a = alloca <4 x i32> ; <<4 x i32>*> [#uses=2]
%b = alloca <4 x i32> ; <<4 x i32>*> [#uses=5]
volatile store <4 x i32> < i32 0, i32 1, i32 2, i32 3 >, <4 x i32>* %a
%tmp = load <4 x i32>* %a ; <<4 x i32>> [#uses=1]
store <4 x i32> %tmp, <4 x i32>* %b
%tmp1 = load <4 x i32>* %b ; <<4 x i32>> [#uses=1]
%tmp2 = load <4 x i32>* %b ; <<4 x i32>> [#uses=1]
%punpckldq = shufflevector <4 x i32> %tmp1, <4 x i32> %tmp2, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x i32>> [#uses=1]
store <4 x i32> %punpckldq, <4 x i32>* %b
%tmp3 = load <4 x i32>* %b ; <<4 x i32>> [#uses=1]
%result = extractelement <4 x i32> %tmp3, i32 0 ; <i32> [#uses=1]
ret i32 %result
}