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Implement ret with operand, giving us this:
int %test(int %A) { ret int %A } git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24773 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -139,8 +139,15 @@ SparcV8TargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy,
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SDOperand SparcV8TargetLowering::LowerReturnTo(SDOperand Chain, SDOperand Op,
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SDOperand SparcV8TargetLowering::LowerReturnTo(SDOperand Chain, SDOperand Op,
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SelectionDAG &DAG) {
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SelectionDAG &DAG) {
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assert(0 && "Unimp");
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if (Op.getValueType() == MVT::i64) {
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abort();
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SDOperand Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op,
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DAG.getConstant(1, MVT::i32));
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SDOperand Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op,
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DAG.getConstant(0, MVT::i32));
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return DAG.getNode(ISD::RET, MVT::Other, Chain, Lo, Hi);
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} else {
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return DAG.getNode(ISD::RET, MVT::Other, Chain, Op);
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}
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}
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}
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SDOperand SparcV8TargetLowering::LowerVAStart(SDOperand Chain, SDOperand VAListP,
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SDOperand SparcV8TargetLowering::LowerVAStart(SDOperand Chain, SDOperand VAListP,
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@ -219,6 +226,30 @@ SDOperand SparcV8DAGToDAGISel::Select(SDOperand Op) {
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switch (N->getOpcode()) {
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switch (N->getOpcode()) {
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default: break;
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default: break;
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case ISD::RET: {
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if (N->getNumOperands() == 2) {
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SDOperand Chain = Select(N->getOperand(0)); // Token chain.
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SDOperand Val = Select(N->getOperand(1));
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if (N->getOperand(1).getValueType() == MVT::i32) {
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Chain = CurDAG->getCopyToReg(Chain, V8::I0, Val);
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} else if (N->getOperand(1).getValueType() == MVT::f32) {
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Chain = CurDAG->getCopyToReg(Chain, V8::F0, Val);
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} else {
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assert(N->getOperand(1).getValueType() == MVT::f64);
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Chain = CurDAG->getCopyToReg(Chain, V8::D0, Val);
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}
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return CurDAG->SelectNodeTo(N, V8::RETL, MVT::Other, Chain);
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} else if (N->getNumOperands() > 1) {
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SDOperand Chain = Select(N->getOperand(0)); // Token chain.
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assert(N->getOperand(1).getValueType() == MVT::i32 &&
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N->getOperand(2).getValueType() == MVT::i32 &&
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N->getNumOperands() == 3 && "Unknown two-register ret value!");
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Chain = CurDAG->getCopyToReg(Chain, V8::I0, Select(N->getOperand(1)));
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Chain = CurDAG->getCopyToReg(Chain, V8::I1, Select(N->getOperand(2)));
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return CurDAG->SelectNodeTo(N, V8::RETL, MVT::Other, Chain);
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}
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break; // Generated code handles the void case.
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}
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}
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}
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return SelectCode(Op);
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return SelectCode(Op);
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@ -139,8 +139,15 @@ SparcV8TargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy,
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SDOperand SparcV8TargetLowering::LowerReturnTo(SDOperand Chain, SDOperand Op,
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SDOperand SparcV8TargetLowering::LowerReturnTo(SDOperand Chain, SDOperand Op,
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SelectionDAG &DAG) {
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SelectionDAG &DAG) {
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assert(0 && "Unimp");
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if (Op.getValueType() == MVT::i64) {
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abort();
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SDOperand Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op,
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DAG.getConstant(1, MVT::i32));
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SDOperand Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op,
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DAG.getConstant(0, MVT::i32));
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return DAG.getNode(ISD::RET, MVT::Other, Chain, Lo, Hi);
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} else {
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return DAG.getNode(ISD::RET, MVT::Other, Chain, Op);
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}
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}
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}
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SDOperand SparcV8TargetLowering::LowerVAStart(SDOperand Chain, SDOperand VAListP,
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SDOperand SparcV8TargetLowering::LowerVAStart(SDOperand Chain, SDOperand VAListP,
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@ -219,6 +226,30 @@ SDOperand SparcV8DAGToDAGISel::Select(SDOperand Op) {
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switch (N->getOpcode()) {
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switch (N->getOpcode()) {
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default: break;
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default: break;
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case ISD::RET: {
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if (N->getNumOperands() == 2) {
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SDOperand Chain = Select(N->getOperand(0)); // Token chain.
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SDOperand Val = Select(N->getOperand(1));
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if (N->getOperand(1).getValueType() == MVT::i32) {
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Chain = CurDAG->getCopyToReg(Chain, V8::I0, Val);
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} else if (N->getOperand(1).getValueType() == MVT::f32) {
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Chain = CurDAG->getCopyToReg(Chain, V8::F0, Val);
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} else {
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assert(N->getOperand(1).getValueType() == MVT::f64);
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Chain = CurDAG->getCopyToReg(Chain, V8::D0, Val);
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}
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return CurDAG->SelectNodeTo(N, V8::RETL, MVT::Other, Chain);
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} else if (N->getNumOperands() > 1) {
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SDOperand Chain = Select(N->getOperand(0)); // Token chain.
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assert(N->getOperand(1).getValueType() == MVT::i32 &&
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N->getOperand(2).getValueType() == MVT::i32 &&
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N->getNumOperands() == 3 && "Unknown two-register ret value!");
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Chain = CurDAG->getCopyToReg(Chain, V8::I0, Select(N->getOperand(1)));
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Chain = CurDAG->getCopyToReg(Chain, V8::I1, Select(N->getOperand(2)));
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return CurDAG->SelectNodeTo(N, V8::RETL, MVT::Other, Chain);
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}
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break; // Generated code handles the void case.
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}
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}
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}
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return SelectCode(Op);
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return SelectCode(Op);
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