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ARM IAS: account for predicated pre-UAL mnemonics
Checking the trailing letter of the mnemonic is insufficient. Be more thorough in the scanning of the instruction to ensure that we correctly work with the predicated mnemonics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198235 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -5107,18 +5107,37 @@ static bool doesIgnoreDataTypeSuffix(StringRef Mnemonic, StringRef DT) {
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}
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static void applyMnemonicAliases(StringRef &Mnemonic, unsigned Features,
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unsigned VariantID);
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static bool RequiresVFPRegListValidation(StringRef Inst,
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bool &AcceptSinglePrecisionOnly,
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bool &AcceptDoublePrecisionOnly) {
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if (Inst.size() < 7)
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return false;
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if (Inst.startswith("fldm") || Inst.startswith("fstm")) {
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StringRef AddressingMode = Inst.substr(4, 2);
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if (AddressingMode == "ia" || AddressingMode == "db" ||
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AddressingMode == "ea" || AddressingMode == "fd") {
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AcceptSinglePrecisionOnly = Inst[6] == 's';
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AcceptDoublePrecisionOnly = Inst[6] == 'd' || Inst[6] == 'x';
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return true;
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}
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}
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return false;
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}
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/// Parse an arm instruction mnemonic followed by its operands.
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bool ARMAsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
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SMLoc NameLoc,
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SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
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// FIXME: Can this be done via tablegen in some fashion?
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bool RequireVFPRegisterList;
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bool AcceptDoublePrecisionOnly;
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bool RequireVFPRegisterListCheck;
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bool AcceptSinglePrecisionOnly;
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RequireVFPRegisterList = Name.startswith("fldm") || Name.startswith("fstm");
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AcceptDoublePrecisionOnly =
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RequireVFPRegisterList && (Name.back() == 'd' || Name.back() == 'x');
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AcceptSinglePrecisionOnly = RequireVFPRegisterList && Name.back() == 's';
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bool AcceptDoublePrecisionOnly;
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RequireVFPRegisterListCheck =
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RequiresVFPRegListValidation(Name, AcceptSinglePrecisionOnly,
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AcceptDoublePrecisionOnly);
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// Apply mnemonic aliases before doing anything else, as the destination
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// mnemonic may include suffices and we want to handle them normally.
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@ -5288,7 +5307,7 @@ bool ARMAsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
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Parser.Lex(); // Consume the EndOfStatement
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if (RequireVFPRegisterList) {
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if (RequireVFPRegisterListCheck) {
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ARMOperand *Op = static_cast<ARMOperand*>(Operands.back());
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if (AcceptSinglePrecisionOnly && !Op->isSPRRegList())
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return Error(Op->getStartLoc(),
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@ -95,3 +95,20 @@ aliases:
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@ CHECK: fldmeax sp!, {s0}
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@ CHECK: ^
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fstmiaxcs r0, {s0}
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fstmiaxhs r0, {s0}
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fstmiaxls r0, {s0}
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fstmiaxvs r0, {s0}
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@ CHECK: error: VFP/Neon double precision register expected
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@ CHECK: fstmiaxcs r0, {s0}
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@ CHECK: ^
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@ CHECK: error: VFP/Neon double precision register expected
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@ CHECK: fstmiaxhs r0, {s0}
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@ CHECK: ^
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@ CHECK: error: VFP/Neon double precision register expected
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@ CHECK: fstmiaxls r0, {s0}
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@ CHECK: ^
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@ CHECK: error: VFP/Neon double precision register expected
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@ CHECK: fstmiaxvs r0, {s0}
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@ CHECK: ^
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@ -51,3 +51,12 @@ aliases:
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@ CHECK: fstmdbx sp!, {d0}
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@ CHECK: fldmdbx sp!, {d0}
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fstmiaxcs r0, {d0}
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fstmiaxhs r0, {d0}
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fstmiaxls r0, {d0}
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fstmiaxvs r0, {d0}
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@ CHECK: fstmiaxhs r0, {d0}
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@ CHECK: fstmiaxhs r0, {d0}
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@ CHECK: fstmiaxls r0, {d0}
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@ CHECK: fstmiaxvs r0, {d0}
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