mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-14 11:32:34 +00:00
Remove more special cases for opcodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72468 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eli Friedman
parent
509150f973
commit
4bc8c71821
@ -164,6 +164,10 @@ private:
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SDValue EmitStackConvert(SDValue SrcOp, MVT SlotVT, MVT DestVT, DebugLoc dl);
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SDValue ExpandBUILD_VECTOR(SDNode *Node);
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SDValue ExpandSCALAR_TO_VECTOR(SDNode *Node);
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SDValue ExpandDBG_STOPPOINT(SDNode *Node);
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void ExpandDYNAMIC_STACKALLOC(SDNode *Node,
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SmallVectorImpl<SDValue> &Results);
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SDValue ExpandFCOPYSIGN(SDNode *Node);
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SDValue ExpandLegalINT_TO_FP(bool isSigned, SDValue LegalOp, MVT DestVT,
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DebugLoc dl);
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SDValue PromoteLegalINT_TO_FP(SDValue LegalOp, MVT DestVT, bool isSigned,
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@ -789,9 +793,11 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
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case ISD::TRAMPOLINE:
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case ISD::FRAMEADDR:
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case ISD::RETURNADDR:
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// These operations lie about being legal: they must always be
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// custom-lowered.
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Action = TargetLowering::Custom;
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// These operations lie about being legal: when they claim to be legal,
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// they should actually be custom-lowered.
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Action = TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0));
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if (Action == TargetLowering::Legal)
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Action = TargetLowering::Custom;
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break;
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case ISD::BUILD_VECTOR:
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// A weird case: when a BUILD_VECTOR is custom-lowered, it doesn't legalize
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@ -883,66 +889,6 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
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#endif
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assert(0 && "Do not know how to legalize this operator!");
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abort();
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case ISD::DBG_STOPPOINT:
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assert(Node->getNumOperands() == 1 && "Invalid DBG_STOPPOINT node!");
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Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the input chain.
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switch (TLI.getOperationAction(ISD::DBG_STOPPOINT, MVT::Other)) {
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case TargetLowering::Promote:
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default: assert(0 && "This action is not supported yet!");
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case TargetLowering::Expand: {
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DwarfWriter *DW = DAG.getDwarfWriter();
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bool useDEBUG_LOC = TLI.isOperationLegalOrCustom(ISD::DEBUG_LOC,
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MVT::Other);
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bool useLABEL = TLI.isOperationLegalOrCustom(ISD::DBG_LABEL, MVT::Other);
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const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(Node);
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GlobalVariable *CU_GV = cast<GlobalVariable>(DSP->getCompileUnit());
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if (DW && (useDEBUG_LOC || useLABEL) && !CU_GV->isDeclaration()) {
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DICompileUnit CU(cast<GlobalVariable>(DSP->getCompileUnit()));
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unsigned Line = DSP->getLine();
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unsigned Col = DSP->getColumn();
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if (OptLevel == CodeGenOpt::None) {
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// A bit self-referential to have DebugLoc on Debug_Loc nodes, but it
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// won't hurt anything.
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if (useDEBUG_LOC) {
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SDValue Ops[] = { Tmp1, DAG.getConstant(Line, MVT::i32),
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DAG.getConstant(Col, MVT::i32),
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DAG.getSrcValue(CU.getGV()) };
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Result = DAG.getNode(ISD::DEBUG_LOC, dl, MVT::Other, Ops, 4);
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} else {
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unsigned ID = DW->RecordSourceLine(Line, Col, CU);
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Result = DAG.getLabel(ISD::DBG_LABEL, dl, Tmp1, ID);
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}
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} else {
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Result = Tmp1; // chain
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}
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} else {
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Result = Tmp1; // chain
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}
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break;
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}
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case TargetLowering::Custom:
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Result = TLI.LowerOperation(Op, DAG);
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if (Result.getNode())
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break;
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case TargetLowering::Legal: {
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if (Tmp1 == Node->getOperand(0))
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break;
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SmallVector<SDValue, 8> Ops;
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Ops.push_back(Tmp1);
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Ops.push_back(Node->getOperand(1)); // line # must be legal.
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Ops.push_back(Node->getOperand(2)); // col # must be legal.
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Ops.push_back(Node->getOperand(3)); // filename must be legal.
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Ops.push_back(Node->getOperand(4)); // working dir # must be legal.
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Result = DAG.UpdateNodeOperands(Result, &Ops[0], Ops.size());
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break;
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}
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}
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break;
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case ISD::FORMAL_ARGUMENTS:
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case ISD::CALL:
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// The only option for this is to custom lower it.
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@ -1081,106 +1027,6 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
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if (Node->getNumValues() == 2)
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AddLegalizedOperand(SDValue(Node, 1), Result.getValue(1));
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return Result.getValue(Op.getResNo());
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case ISD::DYNAMIC_STACKALLOC: {
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MVT VT = Node->getValueType(0);
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Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
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Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the size.
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Tmp3 = LegalizeOp(Node->getOperand(2)); // Legalize the alignment.
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Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Tmp3);
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Tmp1 = Result.getValue(0);
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Tmp2 = Result.getValue(1);
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switch (TLI.getOperationAction(Node->getOpcode(), VT)) {
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default: assert(0 && "This action is not supported yet!");
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case TargetLowering::Expand: {
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unsigned SPReg = TLI.getStackPointerRegisterToSaveRestore();
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assert(SPReg && "Target cannot require DYNAMIC_STACKALLOC expansion and"
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" not tell us which reg is the stack pointer!");
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SDValue Chain = Tmp1.getOperand(0);
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// Chain the dynamic stack allocation so that it doesn't modify the stack
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// pointer when other instructions are using the stack.
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Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(0, true));
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SDValue Size = Tmp2.getOperand(1);
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SDValue SP = DAG.getCopyFromReg(Chain, dl, SPReg, VT);
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Chain = SP.getValue(1);
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unsigned Align = cast<ConstantSDNode>(Tmp3)->getZExtValue();
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unsigned StackAlign =
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TLI.getTargetMachine().getFrameInfo()->getStackAlignment();
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if (Align > StackAlign)
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SP = DAG.getNode(ISD::AND, dl, VT, SP,
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DAG.getConstant(-(uint64_t)Align, VT));
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Tmp1 = DAG.getNode(ISD::SUB, dl, VT, SP, Size); // Value
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Chain = DAG.getCopyToReg(Chain, dl, SPReg, Tmp1); // Output chain
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Tmp2 = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(0, true),
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DAG.getIntPtrConstant(0, true), SDValue());
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Tmp1 = LegalizeOp(Tmp1);
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Tmp2 = LegalizeOp(Tmp2);
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break;
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}
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case TargetLowering::Custom:
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Tmp3 = TLI.LowerOperation(Tmp1, DAG);
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if (Tmp3.getNode()) {
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Tmp1 = LegalizeOp(Tmp3);
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Tmp2 = LegalizeOp(Tmp3.getValue(1));
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}
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break;
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case TargetLowering::Legal:
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break;
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}
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// Since this op produce two values, make sure to remember that we
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// legalized both of them.
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AddLegalizedOperand(SDValue(Node, 0), Tmp1);
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AddLegalizedOperand(SDValue(Node, 1), Tmp2);
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return Op.getResNo() ? Tmp2 : Tmp1;
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}
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case ISD::BR_JT:
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Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
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// Ensure that libcalls are emitted before a branch.
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Tmp1 = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Tmp1, LastCALLSEQ_END);
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Tmp1 = LegalizeOp(Tmp1);
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LastCALLSEQ_END = DAG.getEntryNode();
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Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the jumptable node.
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Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Node->getOperand(2));
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switch (TLI.getOperationAction(ISD::BR_JT, MVT::Other)) {
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default: assert(0 && "This action is not supported yet!");
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case TargetLowering::Legal: break;
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case TargetLowering::Custom:
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Tmp1 = TLI.LowerOperation(Result, DAG);
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if (Tmp1.getNode()) Result = Tmp1;
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break;
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case TargetLowering::Expand: {
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SDValue Chain = Result.getOperand(0);
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SDValue Table = Result.getOperand(1);
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SDValue Index = Result.getOperand(2);
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MVT PTy = TLI.getPointerTy();
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MachineFunction &MF = DAG.getMachineFunction();
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unsigned EntrySize = MF.getJumpTableInfo()->getEntrySize();
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Index= DAG.getNode(ISD::MUL, dl, PTy,
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Index, DAG.getConstant(EntrySize, PTy));
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SDValue Addr = DAG.getNode(ISD::ADD, dl, PTy, Index, Table);
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MVT MemVT = MVT::getIntegerVT(EntrySize * 8);
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SDValue LD = DAG.getExtLoad(ISD::SEXTLOAD, dl, PTy, Chain, Addr,
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PseudoSourceValue::getJumpTable(), 0, MemVT);
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Addr = LD;
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if (TLI.getTargetMachine().getRelocationModel() == Reloc::PIC_) {
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// For PIC, the sequence is:
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// BRIND(load(Jumptable + index) + RelocBase)
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// RelocBase can be JumpTable, GOT or some sort of global base.
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Addr = DAG.getNode(ISD::ADD, dl, PTy, Addr,
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TLI.getPICJumpTableRelocBase(Table, DAG));
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}
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Result = DAG.getNode(ISD::BRIND, dl, MVT::Other, LD.getValue(1), Addr);
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}
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}
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break;
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case ISD::BR_CC:
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Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
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// Ensure that libcalls are emitted before a branch.
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@ -1753,151 +1599,6 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
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break;
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}
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break;
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// Binary operators
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case ISD::FCOPYSIGN: // FCOPYSIGN does not require LHS/RHS to match type!
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Tmp1 = LegalizeOp(Node->getOperand(0)); // LHS
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Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the RHS.
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Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2);
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switch (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0))) {
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default: assert(0 && "Operation not supported");
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case TargetLowering::Custom:
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Tmp1 = TLI.LowerOperation(Result, DAG);
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if (Tmp1.getNode()) Result = Tmp1;
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break;
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case TargetLowering::Legal: break;
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case TargetLowering::Expand: {
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assert((Tmp2.getValueType() == MVT::f32 ||
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Tmp2.getValueType() == MVT::f64) &&
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"Ugly special-cased code!");
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// Get the sign bit of the RHS.
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SDValue SignBit;
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MVT IVT = Tmp2.getValueType() == MVT::f64 ? MVT::i64 : MVT::i32;
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if (isTypeLegal(IVT)) {
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SignBit = DAG.getNode(ISD::BIT_CONVERT, dl, IVT, Tmp2);
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} else {
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assert(isTypeLegal(TLI.getPointerTy()) &&
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(TLI.getPointerTy() == MVT::i32 ||
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TLI.getPointerTy() == MVT::i64) &&
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"Legal type for load?!");
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SDValue StackPtr = DAG.CreateStackTemporary(Tmp2.getValueType());
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SDValue StorePtr = StackPtr, LoadPtr = StackPtr;
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SDValue Ch =
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DAG.getStore(DAG.getEntryNode(), dl, Tmp2, StorePtr, NULL, 0);
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if (Tmp2.getValueType() == MVT::f64 && TLI.isLittleEndian())
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LoadPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(),
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LoadPtr, DAG.getIntPtrConstant(4));
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SignBit = DAG.getExtLoad(ISD::SEXTLOAD, dl, TLI.getPointerTy(),
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Ch, LoadPtr, NULL, 0, MVT::i32);
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}
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SignBit =
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DAG.getSetCC(dl, TLI.getSetCCResultType(SignBit.getValueType()),
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SignBit, DAG.getConstant(0, SignBit.getValueType()),
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ISD::SETLT);
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// Get the absolute value of the result.
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SDValue AbsVal = DAG.getNode(ISD::FABS, dl, Tmp1.getValueType(), Tmp1);
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// Select between the nabs and abs value based on the sign bit of
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// the input.
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Result = DAG.getNode(ISD::SELECT, dl, AbsVal.getValueType(), SignBit,
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DAG.getNode(ISD::FNEG, dl, AbsVal.getValueType(),
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AbsVal),
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AbsVal);
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Result = LegalizeOp(Result);
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break;
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}
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}
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break;
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case ISD::SADDO:
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case ISD::SSUBO: {
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MVT VT = Node->getValueType(0);
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switch (TLI.getOperationAction(Node->getOpcode(), VT)) {
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default: assert(0 && "This action not supported for this op yet!");
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case TargetLowering::Custom:
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Result = TLI.LowerOperation(Op, DAG);
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if (Result.getNode()) break;
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// FALLTHROUGH
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case TargetLowering::Legal: {
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SDValue LHS = LegalizeOp(Node->getOperand(0));
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SDValue RHS = LegalizeOp(Node->getOperand(1));
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SDValue Sum = DAG.getNode(Node->getOpcode() == ISD::SADDO ?
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ISD::ADD : ISD::SUB, dl, LHS.getValueType(),
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LHS, RHS);
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MVT OType = Node->getValueType(1);
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SDValue Zero = DAG.getConstant(0, LHS.getValueType());
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// LHSSign -> LHS >= 0
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// RHSSign -> RHS >= 0
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// SumSign -> Sum >= 0
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//
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// Add:
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// Overflow -> (LHSSign == RHSSign) && (LHSSign != SumSign)
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// Sub:
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// Overflow -> (LHSSign != RHSSign) && (LHSSign != SumSign)
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//
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SDValue LHSSign = DAG.getSetCC(dl, OType, LHS, Zero, ISD::SETGE);
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SDValue RHSSign = DAG.getSetCC(dl, OType, RHS, Zero, ISD::SETGE);
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SDValue SignsMatch = DAG.getSetCC(dl, OType, LHSSign, RHSSign,
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Node->getOpcode() == ISD::SADDO ?
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ISD::SETEQ : ISD::SETNE);
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SDValue SumSign = DAG.getSetCC(dl, OType, Sum, Zero, ISD::SETGE);
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SDValue SumSignNE = DAG.getSetCC(dl, OType, LHSSign, SumSign, ISD::SETNE);
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SDValue Cmp = DAG.getNode(ISD::AND, dl, OType, SignsMatch, SumSignNE);
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MVT ValueVTs[] = { LHS.getValueType(), OType };
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SDValue Ops[] = { Sum, Cmp };
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Result = DAG.getNode(ISD::MERGE_VALUES, dl,
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DAG.getVTList(&ValueVTs[0], 2),
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&Ops[0], 2);
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SDNode *RNode = Result.getNode();
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DAG.ReplaceAllUsesWith(Node, RNode);
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break;
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}
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}
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break;
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}
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case ISD::UADDO:
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case ISD::USUBO: {
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MVT VT = Node->getValueType(0);
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switch (TLI.getOperationAction(Node->getOpcode(), VT)) {
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default: assert(0 && "This action not supported for this op yet!");
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case TargetLowering::Custom:
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Result = TLI.LowerOperation(Op, DAG);
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if (Result.getNode()) break;
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// FALLTHROUGH
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case TargetLowering::Legal: {
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SDValue LHS = LegalizeOp(Node->getOperand(0));
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SDValue RHS = LegalizeOp(Node->getOperand(1));
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SDValue Sum = DAG.getNode(Node->getOpcode() == ISD::UADDO ?
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ISD::ADD : ISD::SUB, dl, LHS.getValueType(),
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LHS, RHS);
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MVT OType = Node->getValueType(1);
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SDValue Cmp = DAG.getSetCC(dl, OType, Sum, LHS,
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Node->getOpcode () == ISD::UADDO ?
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ISD::SETULT : ISD::SETUGT);
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MVT ValueVTs[] = { LHS.getValueType(), OType };
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SDValue Ops[] = { Sum, Cmp };
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Result = DAG.getNode(ISD::MERGE_VALUES, dl,
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DAG.getVTList(&ValueVTs[0], 2),
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&Ops[0], 2);
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SDNode *RNode = Result.getNode();
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DAG.ReplaceAllUsesWith(Node, RNode);
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break;
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}
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}
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break;
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}
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}
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assert(Result.getValueType() == Op.getValueType() &&
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@ -1937,6 +1638,113 @@ SDValue SelectionDAGLegalize::ExpandExtractFromVectorThroughStack(SDValue Op) {
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return DAG.getLoad(Op.getValueType(), dl, Ch, StackPtr, NULL, 0);
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}
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SDValue SelectionDAGLegalize::ExpandFCOPYSIGN(SDNode* Node) {
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DebugLoc dl = Node->getDebugLoc();
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SDValue Tmp1 = Node->getOperand(0);
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SDValue Tmp2 = Node->getOperand(1);
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assert((Tmp2.getValueType() == MVT::f32 ||
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Tmp2.getValueType() == MVT::f64) &&
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"Ugly special-cased code!");
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// Get the sign bit of the RHS.
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SDValue SignBit;
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MVT IVT = Tmp2.getValueType() == MVT::f64 ? MVT::i64 : MVT::i32;
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if (isTypeLegal(IVT)) {
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SignBit = DAG.getNode(ISD::BIT_CONVERT, dl, IVT, Tmp2);
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} else {
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assert(isTypeLegal(TLI.getPointerTy()) &&
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(TLI.getPointerTy() == MVT::i32 ||
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TLI.getPointerTy() == MVT::i64) &&
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"Legal type for load?!");
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SDValue StackPtr = DAG.CreateStackTemporary(Tmp2.getValueType());
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SDValue StorePtr = StackPtr, LoadPtr = StackPtr;
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SDValue Ch =
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DAG.getStore(DAG.getEntryNode(), dl, Tmp2, StorePtr, NULL, 0);
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if (Tmp2.getValueType() == MVT::f64 && TLI.isLittleEndian())
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LoadPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(),
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LoadPtr, DAG.getIntPtrConstant(4));
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SignBit = DAG.getExtLoad(ISD::SEXTLOAD, dl, TLI.getPointerTy(),
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Ch, LoadPtr, NULL, 0, MVT::i32);
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}
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SignBit =
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DAG.getSetCC(dl, TLI.getSetCCResultType(SignBit.getValueType()),
|
||||
SignBit, DAG.getConstant(0, SignBit.getValueType()),
|
||||
ISD::SETLT);
|
||||
// Get the absolute value of the result.
|
||||
SDValue AbsVal = DAG.getNode(ISD::FABS, dl, Tmp1.getValueType(), Tmp1);
|
||||
// Select between the nabs and abs value based on the sign bit of
|
||||
// the input.
|
||||
return DAG.getNode(ISD::SELECT, dl, AbsVal.getValueType(), SignBit,
|
||||
DAG.getNode(ISD::FNEG, dl, AbsVal.getValueType(), AbsVal),
|
||||
AbsVal);
|
||||
}
|
||||
|
||||
SDValue SelectionDAGLegalize::ExpandDBG_STOPPOINT(SDNode* Node) {
|
||||
DebugLoc dl = Node->getDebugLoc();
|
||||
DwarfWriter *DW = DAG.getDwarfWriter();
|
||||
bool useDEBUG_LOC = TLI.isOperationLegalOrCustom(ISD::DEBUG_LOC,
|
||||
MVT::Other);
|
||||
bool useLABEL = TLI.isOperationLegalOrCustom(ISD::DBG_LABEL, MVT::Other);
|
||||
|
||||
const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(Node);
|
||||
GlobalVariable *CU_GV = cast<GlobalVariable>(DSP->getCompileUnit());
|
||||
if (DW && (useDEBUG_LOC || useLABEL) && !CU_GV->isDeclaration()) {
|
||||
DICompileUnit CU(cast<GlobalVariable>(DSP->getCompileUnit()));
|
||||
|
||||
unsigned Line = DSP->getLine();
|
||||
unsigned Col = DSP->getColumn();
|
||||
|
||||
if (OptLevel == CodeGenOpt::None) {
|
||||
// A bit self-referential to have DebugLoc on Debug_Loc nodes, but it
|
||||
// won't hurt anything.
|
||||
if (useDEBUG_LOC) {
|
||||
return DAG.getNode(ISD::DEBUG_LOC, dl, MVT::Other, Node->getOperand(0),
|
||||
DAG.getConstant(Line, MVT::i32),
|
||||
DAG.getConstant(Col, MVT::i32),
|
||||
DAG.getSrcValue(CU.getGV()));
|
||||
} else {
|
||||
unsigned ID = DW->RecordSourceLine(Line, Col, CU);
|
||||
return DAG.getLabel(ISD::DBG_LABEL, dl, Node->getOperand(0), ID);
|
||||
}
|
||||
}
|
||||
}
|
||||
return Node->getOperand(0);
|
||||
}
|
||||
|
||||
void SelectionDAGLegalize::ExpandDYNAMIC_STACKALLOC(SDNode* Node,
|
||||
SmallVectorImpl<SDValue> &Results) {
|
||||
unsigned SPReg = TLI.getStackPointerRegisterToSaveRestore();
|
||||
assert(SPReg && "Target cannot require DYNAMIC_STACKALLOC expansion and"
|
||||
" not tell us which reg is the stack pointer!");
|
||||
DebugLoc dl = Node->getDebugLoc();
|
||||
MVT VT = Node->getValueType(0);
|
||||
SDValue Tmp1 = SDValue(Node, 0);
|
||||
SDValue Tmp2 = SDValue(Node, 1);
|
||||
SDValue Tmp3 = Node->getOperand(2);
|
||||
SDValue Chain = Tmp1.getOperand(0);
|
||||
|
||||
// Chain the dynamic stack allocation so that it doesn't modify the stack
|
||||
// pointer when other instructions are using the stack.
|
||||
Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(0, true));
|
||||
|
||||
SDValue Size = Tmp2.getOperand(1);
|
||||
SDValue SP = DAG.getCopyFromReg(Chain, dl, SPReg, VT);
|
||||
Chain = SP.getValue(1);
|
||||
unsigned Align = cast<ConstantSDNode>(Tmp3)->getZExtValue();
|
||||
unsigned StackAlign =
|
||||
TLI.getTargetMachine().getFrameInfo()->getStackAlignment();
|
||||
if (Align > StackAlign)
|
||||
SP = DAG.getNode(ISD::AND, dl, VT, SP,
|
||||
DAG.getConstant(-(uint64_t)Align, VT));
|
||||
Tmp1 = DAG.getNode(ISD::SUB, dl, VT, SP, Size); // Value
|
||||
Chain = DAG.getCopyToReg(Chain, dl, SPReg, Tmp1); // Output chain
|
||||
|
||||
Tmp2 = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(0, true),
|
||||
DAG.getIntPtrConstant(0, true), SDValue());
|
||||
|
||||
Results.push_back(Tmp1);
|
||||
Results.push_back(Tmp2);
|
||||
}
|
||||
|
||||
/// LegalizeSetCCOperands - Attempts to create a legal LHS and RHS for a SETCC
|
||||
/// with condition CC on the current target. This usually involves legalizing
|
||||
/// or promoting the arguments. In the case where LHS and RHS must be expanded,
|
||||
@ -2672,6 +2480,12 @@ void SelectionDAGLegalize::ExpandNode(SDNode *Node,
|
||||
case ISD::VAEND:
|
||||
Results.push_back(Node->getOperand(0));
|
||||
break;
|
||||
case ISD::DBG_STOPPOINT:
|
||||
Results.push_back(ExpandDBG_STOPPOINT(Node));
|
||||
break;
|
||||
case ISD::DYNAMIC_STACKALLOC:
|
||||
ExpandDYNAMIC_STACKALLOC(Node, Results);
|
||||
break;
|
||||
case ISD::MERGE_VALUES:
|
||||
for (unsigned i = 0; i < Node->getNumValues(); i++)
|
||||
Results.push_back(Node->getOperand(i));
|
||||
@ -2897,6 +2711,9 @@ void SelectionDAGLegalize::ExpandNode(SDNode *Node,
|
||||
Results.push_back(Node->getOperand(0));
|
||||
}
|
||||
break;
|
||||
case ISD::FCOPYSIGN:
|
||||
Results.push_back(ExpandFCOPYSIGN(Node));
|
||||
break;
|
||||
case ISD::FNEG:
|
||||
// Expand Y = FNEG(X) -> Y = SUB -0.0, X
|
||||
Tmp1 = DAG.getConstantFP(-0.0, Node->getValueType(0));
|
||||
@ -3120,6 +2937,53 @@ void SelectionDAGLegalize::ExpandNode(SDNode *Node,
|
||||
Results.push_back(Tmp1);
|
||||
break;
|
||||
}
|
||||
case ISD::SADDO:
|
||||
case ISD::SSUBO: {
|
||||
SDValue LHS = Node->getOperand(0);
|
||||
SDValue RHS = Node->getOperand(1);
|
||||
SDValue Sum = DAG.getNode(Node->getOpcode() == ISD::SADDO ?
|
||||
ISD::ADD : ISD::SUB, dl, LHS.getValueType(),
|
||||
LHS, RHS);
|
||||
Results.push_back(Sum);
|
||||
MVT OType = Node->getValueType(1);
|
||||
|
||||
SDValue Zero = DAG.getConstant(0, LHS.getValueType());
|
||||
|
||||
// LHSSign -> LHS >= 0
|
||||
// RHSSign -> RHS >= 0
|
||||
// SumSign -> Sum >= 0
|
||||
//
|
||||
// Add:
|
||||
// Overflow -> (LHSSign == RHSSign) && (LHSSign != SumSign)
|
||||
// Sub:
|
||||
// Overflow -> (LHSSign != RHSSign) && (LHSSign != SumSign)
|
||||
//
|
||||
SDValue LHSSign = DAG.getSetCC(dl, OType, LHS, Zero, ISD::SETGE);
|
||||
SDValue RHSSign = DAG.getSetCC(dl, OType, RHS, Zero, ISD::SETGE);
|
||||
SDValue SignsMatch = DAG.getSetCC(dl, OType, LHSSign, RHSSign,
|
||||
Node->getOpcode() == ISD::SADDO ?
|
||||
ISD::SETEQ : ISD::SETNE);
|
||||
|
||||
SDValue SumSign = DAG.getSetCC(dl, OType, Sum, Zero, ISD::SETGE);
|
||||
SDValue SumSignNE = DAG.getSetCC(dl, OType, LHSSign, SumSign, ISD::SETNE);
|
||||
|
||||
SDValue Cmp = DAG.getNode(ISD::AND, dl, OType, SignsMatch, SumSignNE);
|
||||
Results.push_back(Cmp);
|
||||
break;
|
||||
}
|
||||
case ISD::UADDO:
|
||||
case ISD::USUBO: {
|
||||
SDValue LHS = Node->getOperand(0);
|
||||
SDValue RHS = Node->getOperand(1);
|
||||
SDValue Sum = DAG.getNode(Node->getOpcode() == ISD::UADDO ?
|
||||
ISD::ADD : ISD::SUB, dl, LHS.getValueType(),
|
||||
LHS, RHS);
|
||||
Results.push_back(Sum);
|
||||
Results.push_back(DAG.getSetCC(dl, Node->getValueType(1), Sum, LHS,
|
||||
Node->getOpcode () == ISD::UADDO ?
|
||||
ISD::SETULT : ISD::SETUGT));
|
||||
break;
|
||||
}
|
||||
case ISD::BUILD_PAIR: {
|
||||
MVT PairTy = Node->getValueType(0);
|
||||
Tmp1 = DAG.getNode(ISD::ZERO_EXTEND, dl, PairTy, Node->getOperand(0));
|
||||
@ -3145,6 +3009,33 @@ void SelectionDAGLegalize::ExpandNode(SDNode *Node,
|
||||
}
|
||||
Results.push_back(Tmp1);
|
||||
break;
|
||||
case ISD::BR_JT: {
|
||||
SDValue Chain = Node->getOperand(0);
|
||||
SDValue Table = Node->getOperand(1);
|
||||
SDValue Index = Node->getOperand(2);
|
||||
|
||||
MVT PTy = TLI.getPointerTy();
|
||||
MachineFunction &MF = DAG.getMachineFunction();
|
||||
unsigned EntrySize = MF.getJumpTableInfo()->getEntrySize();
|
||||
Index= DAG.getNode(ISD::MUL, dl, PTy,
|
||||
Index, DAG.getConstant(EntrySize, PTy));
|
||||
SDValue Addr = DAG.getNode(ISD::ADD, dl, PTy, Index, Table);
|
||||
|
||||
MVT MemVT = MVT::getIntegerVT(EntrySize * 8);
|
||||
SDValue LD = DAG.getExtLoad(ISD::SEXTLOAD, dl, PTy, Chain, Addr,
|
||||
PseudoSourceValue::getJumpTable(), 0, MemVT);
|
||||
Addr = LD;
|
||||
if (TLI.getTargetMachine().getRelocationModel() == Reloc::PIC_) {
|
||||
// For PIC, the sequence is:
|
||||
// BRIND(load(Jumptable + index) + RelocBase)
|
||||
// RelocBase can be JumpTable, GOT or some sort of global base.
|
||||
Addr = DAG.getNode(ISD::ADD, dl, PTy, Addr,
|
||||
TLI.getPICJumpTableRelocBase(Table, DAG));
|
||||
}
|
||||
Tmp1 = DAG.getNode(ISD::BRIND, dl, MVT::Other, LD.getValue(1), Addr);
|
||||
Results.push_back(Tmp1);
|
||||
break;
|
||||
}
|
||||
case ISD::BRCOND:
|
||||
// Expand brcond's setcc into its constituent parts and create a BR_CC
|
||||
// Node.
|
||||
@ -3245,10 +3136,10 @@ void SelectionDAGLegalize::PromoteNode(SDNode *Node,
|
||||
break;
|
||||
case ISD::SELECT:
|
||||
unsigned ExtOp, TruncOp;
|
||||
if (Tmp2.getValueType().isVector()) {
|
||||
if (Node->getValueType(0).isVector()) {
|
||||
ExtOp = ISD::BIT_CONVERT;
|
||||
TruncOp = ISD::BIT_CONVERT;
|
||||
} else if (Tmp2.getValueType().isInteger()) {
|
||||
} else if (Node->getValueType(0).isInteger()) {
|
||||
ExtOp = ISD::ANY_EXTEND;
|
||||
TruncOp = ISD::TRUNCATE;
|
||||
} else {
|
||||
|
||||
Loading…
Reference in New Issue
Block a user