Add several new instructions supported by the latest MicroBlaze.

These instructions are not generated by the backend yet, this will come in a later commit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145161 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Wesley Peck 2011-11-27 05:16:58 +00:00
parent fed700da60
commit 4c729f1152
6 changed files with 70 additions and 1 deletions

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@ -123,6 +123,7 @@ static unsigned decodeSEXT(uint32_t insn) {
case 0x41: return MBlaze::SRL;
case 0x21: return MBlaze::SRC;
case 0x01: return MBlaze::SRA;
case 0xE0: return MBlaze::CLZ;
}
}
@ -176,6 +177,13 @@ static unsigned decodeBR(uint32_t insn) {
}
static unsigned decodeBRI(uint32_t insn) {
switch (insn&0x3FFFFFF) {
default: break;
case 0x0020004: return MBlaze::IDMEMBAR;
case 0x0220004: return MBlaze::DMEMBAR;
case 0x0420004: return MBlaze::IMEMBAR;
}
switch ((insn>>16)&0x1F) {
default: return UNSUPPORTED;
case 0x00: return MBlaze::BRI;
@ -531,6 +539,9 @@ MCDisassembler::DecodeStatus MBlazeDisassembler::getInstruction(MCInst &instr,
default:
return Fail;
case MBlazeII::FC:
break;
case MBlazeII::FRRRR:
if (RD == UNSUPPORTED || RA == UNSUPPORTED || RB == UNSUPPORTED)
return Fail;
@ -547,6 +558,13 @@ MCDisassembler::DecodeStatus MBlazeDisassembler::getInstruction(MCInst &instr,
instr.addOperand(MCOperand::CreateReg(RB));
break;
case MBlazeII::FRR:
if (RD == UNSUPPORTED || RA == UNSUPPORTED)
return Fail;
instr.addOperand(MCOperand::CreateReg(RD));
instr.addOperand(MCOperand::CreateReg(RA));
break;
case MBlazeII::FRI:
switch (opcode) {
default:

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@ -35,6 +35,7 @@ def FRIR : Format<17>; // RSUBI
def FRRRR : Format<18>; // RSUB, FRSUB
def FRI : Format<19>; // RSUB, FRSUB
def FC : Format<20>; // NOP
def FRR : Format<21>; // CLZ
//===----------------------------------------------------------------------===//
// Describe MBlaze instructions format
@ -202,3 +203,26 @@ class MSR<bits<6> op, bits<6> flags, dag outs, dag ins, string asmstr,
let Inst{11-16} = flags;
let Inst{17-31} = imm15;
}
//===----------------------------------------------------------------------===//
// TCLZ instruction class in MBlaze : <|opcode|rd|imm15|>
//===----------------------------------------------------------------------===//
class TCLZ<bits<6> op, bits<16> flags, dag outs, dag ins, string asmstr,
list<dag> pattern, InstrItinClass itin> :
MBlazeInst<op, FRR, outs, ins, asmstr, pattern, itin> {
bits<5> rd;
bits<5> ra;
let Inst{6-10} = rd;
let Inst{11-15} = ra;
let Inst{16-31} = flags;
}
//===----------------------------------------------------------------------===//
// MBAR instruction class in MBlaze : <|opcode|rd|imm15|>
//===----------------------------------------------------------------------===//
class MBAR<bits<6> op, bits<26> flags, dag outs, dag ins, string asmstr,
list<dag> pattern, InstrItinClass itin> :
MBlazeInst<op, FC, outs, ins, asmstr, pattern, itin> {
let Inst{6-31} = flags;
}

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@ -594,9 +594,18 @@ let isReturn=1, isTerminator=1, hasDelaySlot=1, isBarrier=1,
//===----------------------------------------------------------------------===//
let neverHasSideEffects = 1 in {
def NOP : MBlazeInst< 0x20, FC, (outs), (ins), "nop ", [], IIC_ALU>;
def NOP : MBlazeInst<0x20, FC, (outs), (ins), "nop ", [], IIC_ALU>;
}
let Predicates=[HasPatCmp] in {
def CLZ : TCLZ<0x24, 0x00E0, (outs GPR:$dst), (ins GPR:$src),
"clz $dst, $src", [], IIC_ALU>;
}
def IMEMBAR : MBAR<0x2E, 0x0420004, (outs), (ins), "mbar 2", [], IIC_ALU>;
def DMEMBAR : MBAR<0x2E, 0x0220004, (outs), (ins), "mbar 1", [], IIC_ALU>;
def IDMEMBAR : MBAR<0x2E, 0x0020004, (outs), (ins), "mbar 0", [], IIC_ALU>;
let usesCustomInserter = 1 in {
def Select_CC : MBlazePseudo<(outs GPR:$dst),
(ins GPR:$T, GPR:$F, GPR:$CMP, i32imm:$CC), // F T reversed

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@ -51,6 +51,7 @@ namespace MBlazeII {
FRRRR,
FRI,
FC,
FRR,
FormMask = 63
//===------------------------------------------------------------------===//

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@ -0,0 +1,14 @@
# RUN: llvm-mc --disassemble %s -triple=mblaze-unknown-unknown | FileCheck %s
################################################################################
# Memory Barrier instructions
################################################################################
# CHECK: mbar 0
0xB8 0x02 0x00 0x04
# CHECK: mbar 1
0xB8 0x22 0x00 0x04
# CHECK: mbar 2
0xB8 0x42 0x00 0x04

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@ -12,3 +12,6 @@
# CHECK: pcmpeq r0, r1, r2
0x88 0x01 0x14 0x00
# CHECK: clz r0, r1
0x90 0x01 0x00 0xE0