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Make the disassembler tables const so they end up in read-only memory.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117206 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Benjamin Kramer
2010-10-23 09:10:44 +00:00
parent c527407010
commit 4d1dca92bd
5 changed files with 20 additions and 24 deletions
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15
lib/Target/X86/Disassembler/X86Disassembler.cpp
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@ -157,9 +157,8 @@ static void translateRegister(MCInst &mcInst, Reg reg) {
/// @param immediate - The immediate value to append.
/// @param operand - The operand, as stored in the descriptor table.
/// @param insn - The internal instruction.
static void translateImmediate(MCInst &mcInst,
uint64_t immediate,
OperandSpecifier &operand,
static void translateImmediate(MCInst &mcInst, uint64_t immediate,
const OperandSpecifier &operand,
InternalInstruction &insn) {
// Sign-extend the immediate if necessary.
@ -392,9 +391,8 @@ static bool translateRMMemory(MCInst &mcInst, InternalInstruction &insn) {
/// @param insn - The instruction to extract Mod, R/M, and SIB fields
/// from.
/// @return - 0 on success; nonzero otherwise
static bool translateRM(MCInst &mcInst,
OperandSpecifier &operand,
InternalInstruction &insn) {
static bool translateRM(MCInst &mcInst, const OperandSpecifier &operand,
InternalInstruction &insn) {
switch (operand.type) {
default:
debug("Unexpected type for a R/M operand");
@ -461,9 +459,8 @@ static bool translateFPRegister(MCInst &mcInst,
/// @param operand - The operand, as stored in the descriptor table.
/// @param insn - The internal instruction.
/// @return - false on success; true otherwise.
static bool translateOperand(MCInst &mcInst,
OperandSpecifier &operand,
InternalInstruction &insn) {
static bool translateOperand(MCInst &mcInst, const OperandSpecifier &operand,
InternalInstruction &insn) {
switch (operand.encoding) {
default:
debug("Unhandled operand encoding during translation");