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AArch64: don't try to handle [SU]MUL_LOHI nodes
We should set them to expand for now since there are no patterns dealing with them. Actually, there are no instructions either so I doubt they'll ever be acceptable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199265 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -151,6 +151,11 @@ AArch64TargetLowering::AArch64TargetLowering(AArch64TargetMachine &TM)
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setOperationAction(ISD::SDIVREM, MVT::i32, Expand);
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setOperationAction(ISD::SDIVREM, MVT::i64, Expand);
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setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand);
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setOperationAction(ISD::SMUL_LOHI, MVT::i64, Expand);
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setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand);
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setOperationAction(ISD::UMUL_LOHI, MVT::i64, Expand);
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setOperationAction(ISD::CTPOP, MVT::i32, Expand);
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setOperationAction(ISD::CTPOP, MVT::i64, Expand);
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12
test/CodeGen/AArch64/mul-lohi.ll
Normal file
12
test/CodeGen/AArch64/mul-lohi.ll
Normal file
@ -0,0 +1,12 @@
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; RUN: llc -mtriple=aarch64-linux-gnu %s -o - | FileCheck %s
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define i128 @test_128bitmul(i128 %lhs, i128 %rhs) {
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; CHECK: test_128bitmul:
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; CHECK-DAG: umulh [[CARRY:x[0-9]+]], x0, x2
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; CHECK-DAG: madd [[PART1:x[0-9]+]], x0, x3, [[CARRY]]
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; CHECK: madd x1, x1, x2, [[PART1]]
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; CHECK: mul x0, x0, x2
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%prod = mul i128 %lhs, %rhs
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ret i128 %prod
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}
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