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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45698 91177308-0d34-0410-b5e6-96231b3b80d8
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Chris Lattner 2008-01-07 07:46:23 +00:00
parent f14cf85e33
commit 4e4e46143a
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7
lib/Target/README.txt
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@ -2,6 +2,13 @@ Target Independent Opportunities:
//===---------------------------------------------------------------------===//
We should make the various target's "IMPLICIT_DEF" instructions be a single
target-independent opcode like TargetInstrInfo::INLINEASM. This would allow
us to eliminate the TargetInstrDesc::isImplicitDef() method, and would allow
us to avoid having to define this for every target for every register class.
//===---------------------------------------------------------------------===//
With the recent changes to make the implicit def/use set explicit in
machineinstrs, we should change the target descriptions for 'call' instructions
so that the .td files don't list all the call-clobbered registers as implicit