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make sure 'special' registers don't get allocated
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21109 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -234,9 +234,8 @@ def B6 : GR<0, "b6">;
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// in IA64RegisterInfo.cpp
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def GR : RegisterClass<i64, 64,
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[/*r2,*/ r3,
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r8, r9, r10, r11, r14, /*r15, */
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r16, r17, r18, r19, r20, r21, /*r22,*/ r23,
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[r3, r8, r9, r10, r11, r14,
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r16, r17, r18, r19, r20, r21, r23,
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r24, r25, r26, r27, r28, r29, r30, r31,
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r32, r33, r34, r35, r36, r37, r38, r39,
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r40, r41, r42, r43, r44, r45, r46, r47,
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@ -249,7 +248,17 @@ def GR : RegisterClass<i64, 64,
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r96, r97, r98, r99, r100, r101, r102, r103,
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r104, r105, r106, r107, r108, r109, r110, r111,
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r112, r113, r114, r115, r116, r117, r118, r119,
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r120, r121, r122, r123, r124, r125, r126, r127]>;
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r120, r121, r122, r123, r124, r125, r126, r127,
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r0, r1, r2, r12, r13, r15, r22]> // these last 7 are special (look down)
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{
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let Methods = [{
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iterator allocation_order_end(MachineFunction &MF) const {
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return end()-7; // 7 special registers
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}
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}];
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}
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// these are the scratch (+stacked) FP registers
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// ZERO (F0) and ONE (F1) are not here
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