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Remove a bunch more dead V9 specific stuff

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28094 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2006-05-04 01:26:39 +00:00
parent ea50fabfd4
commit 4efeab208c
5 changed files with 16 additions and 109 deletions
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77
include/llvm/CodeGen/MachineInstr.h
View File

@ -37,35 +37,8 @@ typedef short MachineOpCode;
//===----------------------------------------------------------------------===//
// class MachineOperand
//
// Purpose:
// Representation of each machine instruction operand.
// This class is designed so that you can allocate a vector of operands
// first and initialize each one later.
//
// E.g, for this VM instruction:
// ptr = alloca type, numElements
// we generate 2 machine instructions on the SPARC:
//
// mul Constant, Numelements -> Reg
// add %sp, Reg -> Ptr
//
// Each instruction has 3 operands, listed above. Of those:
// - Reg, NumElements, and Ptr are of operand type MO_Register.
// - Constant is of operand type MO_SignExtendedImmed on the SPARC.
//
// For the register operands, the virtual register type is as follows:
//
// - Reg will be of virtual register type MO_MInstrVirtualReg. The field
// MachineInstr* minstr will point to the instruction that computes reg.
//
// - NumElements will be of virtual register type MO_VirtualReg.
// The field Value* value identifies the value.
//
// - Ptr will also be of virtual register type MO_VirtualReg.
// Again, the field Value* value identifies the value.
//
//===----------------------------------------------------------------------===//
struct MachineOperand {
private:
// Bit fields of the flags variable used for different operand properties
@ -130,15 +103,11 @@ private:
memset (&extra, 0, sizeof (extra));
}
MachineOperand(int64_t ImmVal = 0,
MachineOperandType OpTy = MO_VirtualRegister, int Offset = 0)
MachineOperand(int64_t ImmVal, MachineOperandType OpTy, int Offset = 0)
: flags(0), opType(OpTy) {
zeroContents ();
contents.immedVal = ImmVal;
if (OpTy == MachineOperand::MO_ConstantPoolIndex)
extra.offset = Offset;
else
extra.regNum = -1;
extra.offset = Offset;
}
MachineOperand(int Reg, MachineOperandType OpTy, UseType UseTy)
@ -147,10 +116,8 @@ private:
extra.regNum = Reg;
}
MachineOperand(GlobalValue *V, MachineOperandType OpTy, UseType UseTy,
int Offset = 0)
: flags(UseTy), opType(OpTy) {
assert(OpTy == MachineOperand::MO_GlobalAddress);
MachineOperand(GlobalValue *V, int Offset = 0)
: flags(MachineOperand::Use), opType(MachineOperand::MO_GlobalAddress) {
zeroContents ();
contents.value = (Value*)V;
extra.offset = Offset;
@ -160,7 +127,6 @@ private:
: flags(0), opType(MO_MachineBasicBlock) {
zeroContents ();
contents.MBB = mbb;
extra.regNum = -1;
}
MachineOperand(const char *SymName, int Offset)
@ -196,11 +162,7 @@ public:
///
UseType getUseType() const { return UseType(flags & (USEFLAG|DEFFLAG)); }
/// isRegister - Return true if this operand is a register operand. The X86
/// backend currently can't decide whether to use MO_MR or MO_VR to represent
/// them, so we accept both.
///
/// Note: The sparc backend should not use this method.
/// isRegister - Return true if this operand is a register operand.
///
bool isRegister() const {
return opType == MO_VirtualRegister;
@ -218,20 +180,6 @@ public:
bool isGlobalAddress() const { return opType == MO_GlobalAddress; }
bool isExternalSymbol() const { return opType == MO_ExternalSymbol; }
/// getVRegValueOrNull - Get the Value* out of a MachineOperand if it
/// has one. This is deprecated and only used by the SPARC v9 backend.
///
Value* getVRegValueOrNull() const {
return opType == MO_VirtualRegister ? contents.value : NULL;
}
/// MachineOperand accessors that only work on certain types of
/// MachineOperand...
///
Value* getVRegValue() const {
assert(opType == MO_VirtualRegister && "Wrong MachineOperand accessor");
return contents.value;
}
int64_t getImmedValue() const {
assert(isImmediate() && "Wrong MachineOperand accessor");
return contents.immedVal;
@ -293,20 +241,13 @@ public:
return extra.regNum;
}
/// MachineOperand mutators...
/// MachineOperand mutators.
///
void setReg(unsigned Reg) {
// This method's comment used to say: 'TODO: get rid of this duplicate
// code.' It's not clear where the duplication is.
assert(hasAllocatedReg() && "This operand cannot have a register number!");
extra.regNum = Reg;
}
void setValueReg(Value *val) {
assert(getVRegValueOrNull() != 0 && "Original operand must of type Value*");
contents.value = val;
}
void setImmedValue(int immVal) {
assert(isImmediate() && "Wrong MachineOperand mutator");
contents.immedVal = immVal;
@ -362,8 +303,6 @@ class MachineInstr {
friend struct ilist_traits<MachineInstr>;
public:
MachineInstr(short Opcode, unsigned numOperands);
/// MachineInstr ctor - This constructor only does a _reserve_ of the
/// operands, not a resize for them. It is expected that if you use this that
/// you call add* methods below to fill up the operands, instead of the Set
@ -510,9 +449,7 @@ public:
void addGlobalAddressOperand(GlobalValue *GV, int Offset) {
assert(!OperandsComplete() &&
"Trying to add an operand to a machine instr that is already done!");
operands.push_back(
MachineOperand(GV, MachineOperand::MO_GlobalAddress,
MachineOperand::Use, Offset));
operands.push_back(MachineOperand(GV, Offset));
}
/// addExternalSymbolOperand - Add an external symbol operand to this instr

12
lib/CodeGen/LiveVariables.cpp
View File

@ -296,14 +296,12 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &MF) {
"Didn't find an entry for our predecessor??");
if (MI->getOperand(i+1).getMachineBasicBlock() == MBB) {
MachineOperand &MO = MI->getOperand(i);
if (!MO.getVRegValueOrNull()) {
VarInfo &VRInfo = getVarInfo(MO.getReg());
assert(VRInfo.DefInst && "Register use before def (or no def)!");
VarInfo &VRInfo = getVarInfo(MO.getReg());
assert(VRInfo.DefInst && "Register use before def (or no def)!");
// Only mark it alive only in the block we are representing.
MarkVirtRegAliveInBlock(VRInfo, MBB);
break; // Found the PHI entry for this block.
}
// Only mark it alive only in the block we are representing.
MarkVirtRegAliveInBlock(VRInfo, MBB);
break; // Found the PHI entry for this block.
}
}
}

2
lib/CodeGen/MachineBasicBlock.cpp
View File

@ -47,7 +47,7 @@ void ilist_traits<MachineBasicBlock>::removeNodeFromList(MachineBasicBlock* N) {
MachineInstr* ilist_traits<MachineInstr>::createSentinel() {
MachineInstr* dummy = new MachineInstr(0, 0);
MachineInstr* dummy = new MachineInstr(0, 0, true, true);
LeakDetector::removeGarbageObject(dummy);
return dummy;
}

27
lib/CodeGen/MachineInstr.cpp
View File

@ -36,15 +36,6 @@ namespace llvm {
extern const TargetInstrDescriptor *TargetInstrDescriptors;
}
// Constructor for instructions with variable #operands
MachineInstr::MachineInstr(short opcode, unsigned numOperands)
: Opcode(opcode),
operands(numOperands, MachineOperand()),
parent(0) {
// Make sure that we get added to a machine basicblock
LeakDetector::addGarbageObject(this);
}
/// MachineInstr ctor - This constructor only does a _reserve_ of the operands,
/// not a resize for them. It is expected that if you use this that you call
/// add* methods below to fill up the operands, instead of the Set methods.
@ -178,14 +169,7 @@ static void print(const MachineOperand &MO, std::ostream &OS,
switch (MO.getType()) {
case MachineOperand::MO_VirtualRegister:
if (MO.getVRegValue()) {
OS << "%reg";
OutputValue(OS, MO.getVRegValue());
if (MO.hasAllocatedReg())
OS << "==";
}
if (MO.hasAllocatedReg())
OutputReg(OS, MO.getReg(), MRI);
OutputReg(OS, MO.getReg(), MRI);
break;
case MachineOperand::MO_SignExtendedImmed:
OS << (long)MO.getImmedValue();
@ -285,14 +269,7 @@ std::ostream &llvm::operator<<(std::ostream &os, const MachineInstr &MI) {
std::ostream &llvm::operator<<(std::ostream &OS, const MachineOperand &MO) {
switch (MO.getType()) {
case MachineOperand::MO_VirtualRegister:
if (MO.hasAllocatedReg())
OutputReg(OS, MO.getReg());
if (MO.getVRegValue()) {
if (MO.hasAllocatedReg()) OS << "==";
OS << "%vreg";
OutputValue(OS, MO.getVRegValue());
}
OutputReg(OS, MO.getReg());
break;
case MachineOperand::MO_SignExtendedImmed:
OS << (long)MO.getImmedValue();

7
lib/Target/X86/X86CodeEmitter.cpp
View File

@ -432,12 +432,7 @@ void Emitter::emitInstruction(const MachineInstr &MI) {
MCE.emitByte(BaseOpcode + getX86RegNum(MI.getOperand(0).getReg()));
if (MI.getNumOperands() == 2) {
const MachineOperand &MO1 = MI.getOperand(1);
if (Value *V = MO1.getVRegValueOrNull()) {
assert(0 && "??");
assert(sizeOfImm(Desc) == 4 &&
"Don't know how to emit non-pointer values!");
emitGlobalAddressForPtr(cast<GlobalValue>(V));
} else if (MO1.isGlobalAddress()) {
if (MO1.isGlobalAddress()) {
assert(sizeOfImm(Desc) == 4 &&
"Don't know how to emit non-pointer values!");
emitGlobalAddressForPtr(MO1.getGlobal(), MO1.getOffset());