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Enhance tests to include shifted-register operand testing.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74490 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
David Goodwin 2009-06-30 01:02:20 +00:00
parent 3fb7683bec
commit 4ff863c257
14 changed files with 426 additions and 20 deletions
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32
test/CodeGen/Thumb2/thumb2-add5.ll
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@ -1,6 +1,36 @@
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {add\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {add\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {add\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {add\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {add\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {add\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
define i32 @f1(i32 %a, i32 %b) {
%tmp = add i32 %a, %b
ret i32 %tmp
}
define i32 @f2(i32 %a, i32 %b) {
%tmp = shl i32 %b, 5
%tmp1 = add i32 %a, %tmp
ret i32 %tmp1
}
define i32 @f3(i32 %a, i32 %b) {
%tmp = lshr i32 %b, 6
%tmp1 = add i32 %a, %tmp
ret i32 %tmp1
}
define i32 @f4(i32 %a, i32 %b) {
%tmp = ashr i32 %b, 7
%tmp1 = add i32 %a, %tmp
ret i32 %tmp1
}
define i32 @f5(i32 %a, i32 %b) {
%l8 = shl i32 %a, 24
%r8 = lshr i32 %a, 8
%tmp = or i32 %l8, %r8
%tmp1 = add i32 %a, %tmp
ret i32 %tmp1
}

32
test/CodeGen/Thumb2/thumb2-and.ll
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@ -1,6 +1,36 @@
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {and\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {and\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {and\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {and\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {and\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {and\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
define i32 @f1(i32 %a, i32 %b) {
%tmp = and i32 %a, %b
ret i32 %tmp
}
define i32 @f2(i32 %a, i32 %b) {
%tmp = shl i32 %b, 5
%tmp1 = and i32 %a, %tmp
ret i32 %tmp1
}
define i32 @f3(i32 %a, i32 %b) {
%tmp = lshr i32 %b, 6
%tmp1 = and i32 %a, %tmp
ret i32 %tmp1
}
define i32 @f4(i32 %a, i32 %b) {
%tmp = ashr i32 %b, 7
%tmp1 = and i32 %a, %tmp
ret i32 %tmp1
}
define i32 @f5(i32 %a, i32 %b) {
%l8 = shl i32 %a, 24
%r8 = lshr i32 %a, 8
%tmp = or i32 %l8, %r8
%tmp1 = and i32 %a, %tmp
ret i32 %tmp1
}

36
test/CodeGen/Thumb2/thumb2-bic.ll
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@ -1,4 +1,8 @@
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {bic\\W*r\[0-9\]*,\\W*r\[0-9\]*,\\W*r\[0-9\]*} | count 4
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {bic\\W*r\[0-9\]*,\\W*r\[0-9\]*,\\W*r\[0-9\]*$} | count 4
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {bic\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {bic\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {bic\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {bic\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
define i32 @f1(i32 %a, i32 %b) {
%tmp = xor i32 %b, 4294967295
@ -23,3 +27,33 @@ define i32 @f4(i32 %a, i32 %b) {
%tmp1 = and i32 %tmp, %a
ret i32 %tmp1
}
define i32 @f5(i32 %a, i32 %b) {
%tmp = shl i32 %b, 5
%tmp1 = xor i32 4294967295, %tmp
%tmp2 = and i32 %a, %tmp1
ret i32 %tmp2
}
define i32 @f6(i32 %a, i32 %b) {
%tmp = lshr i32 %b, 6
%tmp1 = xor i32 %tmp, 4294967295
%tmp2 = and i32 %tmp1, %a
ret i32 %tmp2
}
define i32 @f7(i32 %a, i32 %b) {
%tmp = ashr i32 %b, 7
%tmp1 = xor i32 %tmp, 4294967295
%tmp2 = and i32 %a, %tmp1
ret i32 %tmp2
}
define i32 @f8(i32 %a, i32 %b) {
%l8 = shl i32 %a, 24
%r8 = lshr i32 %a, 8
%tmp = or i32 %l8, %r8
%tmp1 = xor i32 4294967295, %tmp
%tmp2 = and i32 %tmp1, %a
ret i32 %tmp2
}

36
test/CodeGen/Thumb2/thumb2-cmn.ll
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@ -1,4 +1,8 @@
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmn\\W*r\[0-9\],\\W*r\[0-9\]} | count 4
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmn\\W*r\[0-9\],\\W*r\[0-9\]$} | count 4
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmn\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmn\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmn\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmn\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
define i1 @f1(i32 %a, i32 %b) {
%nb = sub i32 0, %b
@ -23,3 +27,33 @@ define i1 @f4(i32 %a, i32 %b) {
%tmp = icmp eq i32 %nb, %a
ret i1 %tmp
}
define i1 @f5(i32 %a, i32 %b) {
%tmp = shl i32 %b, 5
%nb = sub i32 0, %tmp
%tmp1 = icmp eq i32 %nb, %a
ret i1 %tmp1
}
define i1 @f6(i32 %a, i32 %b) {
%tmp = lshr i32 %b, 6
%nb = sub i32 0, %tmp
%tmp1 = icmp ne i32 %nb, %a
ret i1 %tmp1
}
define i1 @f7(i32 %a, i32 %b) {
%tmp = ashr i32 %b, 7
%nb = sub i32 0, %tmp
%tmp1 = icmp eq i32 %a, %nb
ret i1 %tmp1
}
define i1 @f8(i32 %a, i32 %b) {
%l8 = shl i32 %a, 24
%r8 = lshr i32 %a, 8
%tmp = or i32 %l8, %r8
%nb = sub i32 0, %tmp
%tmp1 = icmp ne i32 %a, %nb
ret i1 %tmp1
}

2
test/CodeGen/Thumb2/thumb2-cmp.ll
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@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep "cmp " | grep {#187\\|#11141290\\|#3422604288\\|#1114112\\|#3722304989} | count 5
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\W*r\[0-9\],\\W*#\[0-9\]*$} | grep {#187\\|#11141290\\|#3422604288\\|#1114112\\|#3722304989} | count 5
; 0x000000bb = 187
define i1 @f1(i32 %a) {

32
test/CodeGen/Thumb2/thumb2-cmp2.ll
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@ -1,4 +1,8 @@
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\W*r\[0-9\],\\W*r\[0-9\]} | count 2
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\W*r\[0-9\],\\W*r\[0-9\]$} | count 2
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
define i1 @f1(i32 %a, i32 %b) {
%tmp = icmp ne i32 %a, %b
@ -9,3 +13,29 @@ define i1 @f2(i32 %a, i32 %b) {
%tmp = icmp eq i32 %a, %b
ret i1 %tmp
}
define i1 @f6(i32 %a, i32 %b) {
%tmp = shl i32 %b, 5
%tmp1 = icmp eq i32 %tmp, %a
ret i1 %tmp1
}
define i1 @f7(i32 %a, i32 %b) {
%tmp = lshr i32 %b, 6
%tmp1 = icmp ne i32 %tmp, %a
ret i1 %tmp1
}
define i1 @f8(i32 %a, i32 %b) {
%tmp = ashr i32 %b, 7
%tmp1 = icmp eq i32 %a, %tmp
ret i1 %tmp1
}
define i1 @f9(i32 %a, i32 %b) {
%l8 = shl i32 %a, 24
%r8 = lshr i32 %a, 8
%tmp = or i32 %l8, %r8
%tmp1 = icmp ne i32 %a, %tmp
ret i1 %tmp1
}

37
test/CodeGen/Thumb2/thumb2-eor.ll
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@ -1,6 +1,41 @@
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {eor\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {eor\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]$} | count 2
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {eor\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {eor\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {eor\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {eor\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
define i32 @f1(i32 %a, i32 %b) {
%tmp = xor i32 %a, %b
ret i32 %tmp
}
define i32 @f2(i32 %a, i32 %b) {
%tmp = xor i32 %b, %a
ret i32 %tmp
}
define i32 @f3(i32 %a, i32 %b) {
%tmp = shl i32 %b, 5
%tmp1 = xor i32 %a, %tmp
ret i32 %tmp1
}
define i32 @f4(i32 %a, i32 %b) {
%tmp = lshr i32 %b, 6
%tmp1 = xor i32 %tmp, %a
ret i32 %tmp1
}
define i32 @f5(i32 %a, i32 %b) {
%tmp = ashr i32 %b, 7
%tmp1 = xor i32 %a, %tmp
ret i32 %tmp1
}
define i32 @f6(i32 %a, i32 %b) {
%l8 = shl i32 %a, 24
%r8 = lshr i32 %a, 8
%tmp = or i32 %l8, %r8
%tmp1 = xor i32 %tmp, %a
ret i32 %tmp1
}

32
test/CodeGen/Thumb2/thumb2-mvn2.ll
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@ -1,4 +1,8 @@
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mvn\\W*r\[0-9\]*,\\W*r\[0-9\]*} | count 2
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mvn\\W*r\[0-9\]*,\\W*r\[0-9\]*$} | count 2
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mvn\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mvn\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mvn\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mvn\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
define i32 @f1(i32 %a) {
%tmp = xor i32 4294967295, %a
@ -9,3 +13,29 @@ define i32 @f2(i32 %a) {
%tmp = xor i32 %a, 4294967295
ret i32 %tmp
}
define i32 @f5(i32 %a) {
%tmp = shl i32 %a, 5
%tmp1 = xor i32 %tmp, 4294967295
ret i32 %tmp1
}
define i32 @f6(i32 %a) {
%tmp = lshr i32 %a, 6
%tmp1 = xor i32 %tmp, 4294967295
ret i32 %tmp1
}
define i32 @f7(i32 %a) {
%tmp = ashr i32 %a, 7
%tmp1 = xor i32 %tmp, 4294967295
ret i32 %tmp1
}
define i32 @f8(i32 %a) {
%l8 = shl i32 %a, 24
%r8 = lshr i32 %a, 8
%tmp = or i32 %l8, %r8
%tmp1 = xor i32 %tmp, 4294967295
ret i32 %tmp1
}

36
test/CodeGen/Thumb2/thumb2-orn.ll
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@ -1,4 +1,8 @@
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orn\\W*r\[0-9\]*,\\W*r\[0-9\]*,\\W*r\[0-9\]*} | count 4
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orn\\W*r\[0-9\]*,\\W*r\[0-9\]*,\\W*r\[0-9\]*$} | count 4
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orn\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orn\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orn\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orn\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
define i32 @f1(i32 %a, i32 %b) {
%tmp = xor i32 %b, 4294967295
@ -23,3 +27,33 @@ define i32 @f4(i32 %a, i32 %b) {
%tmp1 = or i32 %tmp, %a
ret i32 %tmp1
}
define i32 @f5(i32 %a, i32 %b) {
%tmp = shl i32 %b, 5
%tmp1 = xor i32 4294967295, %tmp
%tmp2 = or i32 %a, %tmp1
ret i32 %tmp2
}
define i32 @f6(i32 %a, i32 %b) {
%tmp = lshr i32 %b, 6
%tmp1 = xor i32 4294967295, %tmp
%tmp2 = or i32 %a, %tmp1
ret i32 %tmp2
}
define i32 @f7(i32 %a, i32 %b) {
%tmp = ashr i32 %b, 7
%tmp1 = xor i32 4294967295, %tmp
%tmp2 = or i32 %a, %tmp1
ret i32 %tmp2
}
define i32 @f8(i32 %a, i32 %b) {
%l8 = shl i32 %a, 24
%r8 = lshr i32 %a, 8
%tmp = or i32 %l8, %r8
%tmp1 = xor i32 4294967295, %tmp
%tmp2 = or i32 %a, %tmp1
ret i32 %tmp2
}

32
test/CodeGen/Thumb2/thumb2-orr.ll
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@ -1,6 +1,36 @@
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orr\\W*r\[0-9\]*,\\W*r\[0-9\]*,\\W*r\[0-9\]*} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orr\\W*r\[0-9\]*,\\W*r\[0-9\]*,\\W*r\[0-9\]*$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orr\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orr\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orr\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orr\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
define i32 @f1(i32 %a, i32 %b) {
%tmp2 = or i32 %a, %b
ret i32 %tmp2
}
define i32 @f5(i32 %a, i32 %b) {
%tmp = shl i32 %b, 5
%tmp2 = or i32 %a, %tmp
ret i32 %tmp2
}
define i32 @f6(i32 %a, i32 %b) {
%tmp = lshr i32 %b, 6
%tmp2 = or i32 %a, %tmp
ret i32 %tmp2
}
define i32 @f7(i32 %a, i32 %b) {
%tmp = ashr i32 %b, 7
%tmp2 = or i32 %a, %tmp
ret i32 %tmp2
}
define i32 @f8(i32 %a, i32 %b) {
%l8 = shl i32 %a, 24
%r8 = lshr i32 %a, 8
%tmp = or i32 %l8, %r8
%tmp2 = or i32 %a, %tmp
ret i32 %tmp2
}

35
test/CodeGen/Thumb2/thumb2-rsb.ll
View File

@ -1,9 +1,30 @@
; XFAIL: *
; this will match as "sub" until we get register shifting
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {rsb\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {rsb\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {rsb\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {rsb\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {rsb\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]*} | count 1
define i32 @f1(i32 %a, i32 %b) {
%tmp = sub i32 %b, %a
ret i32 %tmp
define i32 @f2(i32 %a, i32 %b) {
%tmp = shl i32 %b, 5
%tmp1 = sub i32 %tmp, %a
ret i32 %tmp1
}
define i32 @f3(i32 %a, i32 %b) {
%tmp = lshr i32 %b, 6
%tmp1 = sub i32 %tmp, %a
ret i32 %tmp1
}
define i32 @f4(i32 %a, i32 %b) {
%tmp = ashr i32 %b, 7
%tmp1 = sub i32 %tmp, %a
ret i32 %tmp1
}
define i32 @f5(i32 %a, i32 %b) {
%l8 = shl i32 %a, 24
%r8 = lshr i32 %a, 8
%tmp = or i32 %l8, %r8
%tmp1 = sub i32 %tmp, %a
ret i32 %tmp1
}

32
test/CodeGen/Thumb2/thumb2-sub4.ll
View File

@ -1,6 +1,36 @@
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
define i32 @f1(i32 %a, i32 %b) {
%tmp = sub i32 %a, %b
ret i32 %tmp
}
define i32 @f2(i32 %a, i32 %b) {
%tmp = shl i32 %b, 5
%tmp1 = sub i32 %a, %tmp
ret i32 %tmp1
}
define i32 @f3(i32 %a, i32 %b) {
%tmp = lshr i32 %b, 6
%tmp1 = sub i32 %a, %tmp
ret i32 %tmp1
}
define i32 @f4(i32 %a, i32 %b) {
%tmp = ashr i32 %b, 7
%tmp1 = sub i32 %a, %tmp
ret i32 %tmp1
}
define i32 @f5(i32 %a, i32 %b) {
%l8 = shl i32 %a, 24
%r8 = lshr i32 %a, 8
%tmp = or i32 %l8, %r8
%tmp1 = sub i32 %a, %tmp
ret i32 %tmp1
}

36
test/CodeGen/Thumb2/thumb2-teq2.ll
View File

@ -1,4 +1,8 @@
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {teq\\W*r\[0-9\],\\W*r\[0-9\]} | count 4
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {teq\\W*r\[0-9\],\\W*r\[0-9\]$} | count 4
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {teq\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {teq\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {teq\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {teq\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
define i1 @f1(i32 %a, i32 %b) {
%tmp = xor i32 %a, %b
@ -23,3 +27,33 @@ define i1 @f4(i32 %a, i32 %b) {
%tmp1 = icmp eq i32 0, %tmp
ret i1 %tmp1
}
define i1 @f6(i32 %a, i32 %b) {
%tmp = shl i32 %b, 5
%tmp1 = xor i32 %a, %tmp
%tmp2 = icmp eq i32 %tmp1, 0
ret i1 %tmp2
}
define i1 @f7(i32 %a, i32 %b) {
%tmp = lshr i32 %b, 6
%tmp1 = xor i32 %a, %tmp
%tmp2 = icmp eq i32 %tmp1, 0
ret i1 %tmp2
}
define i1 @f8(i32 %a, i32 %b) {
%tmp = ashr i32 %b, 7
%tmp1 = xor i32 %a, %tmp
%tmp2 = icmp eq i32 %tmp1, 0
ret i1 %tmp2
}
define i1 @f9(i32 %a, i32 %b) {
%l8 = shl i32 %a, 24
%r8 = lshr i32 %a, 8
%tmp = or i32 %l8, %r8
%tmp1 = xor i32 %a, %tmp
%tmp2 = icmp eq i32 %tmp1, 0
ret i1 %tmp2
}

36
test/CodeGen/Thumb2/thumb2-tst2.ll
View File

@ -1,4 +1,8 @@
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {tst\\W*r\[0-9\],\\W*r\[0-9\]} | count 4
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {tst\\W*r\[0-9\],\\W*r\[0-9\]$} | count 4
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {tst\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {tst\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {tst\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {tst\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1
define i1 @f1(i32 %a, i32 %b) {
%tmp = and i32 %a, %b
@ -23,3 +27,33 @@ define i1 @f4(i32 %a, i32 %b) {
%tmp1 = icmp eq i32 0, %tmp
ret i1 %tmp1
}
define i1 @f6(i32 %a, i32 %b) {
%tmp = shl i32 %b, 5
%tmp1 = and i32 %a, %tmp
%tmp2 = icmp eq i32 %tmp1, 0
ret i1 %tmp2
}
define i1 @f7(i32 %a, i32 %b) {
%tmp = lshr i32 %b, 6
%tmp1 = and i32 %a, %tmp
%tmp2 = icmp eq i32 %tmp1, 0
ret i1 %tmp2
}
define i1 @f8(i32 %a, i32 %b) {
%tmp = ashr i32 %b, 7
%tmp1 = and i32 %a, %tmp
%tmp2 = icmp eq i32 %tmp1, 0
ret i1 %tmp2
}
define i1 @f9(i32 %a, i32 %b) {
%l8 = shl i32 %a, 24
%r8 = lshr i32 %a, 8
%tmp = or i32 %l8, %r8
%tmp1 = and i32 %a, %tmp
%tmp2 = icmp eq i32 %tmp1, 0
ret i1 %tmp2
}