avoid type mismatch when building SCEVs

This is a corner case I have stumbled upon when dealing with ARM64 type
conversions. I was not able to extract a testcase for the community codebase to
fail on. The patch conservatively discards a division that would have ended up
in an ICE due to a type mismatch when building a multiply expression. I have
also added code to a place that builds add expressions and in which we should be
careful not to pass in operands of different types.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209694 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Sebastian Pop 2014-05-27 22:42:00 +00:00
parent bf48d8ae51
commit 5013d1d5e4

View File

@ -7131,9 +7131,19 @@ public:
void visitAddExpr(const SCEVAddExpr *Numerator) {
SmallVector<const SCEV *, 2> Qs, Rs;
Type *Ty = Denominator->getType();
for (const SCEV *Op : Numerator->operands()) {
const SCEV *Q, *R;
divide(SE, Op, Denominator, &Q, &R);
// Bail out if types do not match.
if (Ty != Q->getType() || Ty != R->getType()) {
Quotient = Zero;
Remainder = Numerator;
return;
}
Qs.push_back(Q);
Rs.push_back(R);
}
@ -7150,9 +7160,17 @@ public:
void visitMulExpr(const SCEVMulExpr *Numerator) {
SmallVector<const SCEV *, 2> Qs;
Type *Ty = Denominator->getType();
bool FoundDenominatorTerm = false;
for (const SCEV *Op : Numerator->operands()) {
// Bail out if types do not match.
if (Ty != Op->getType()) {
Quotient = Zero;
Remainder = Numerator;
return;
}
if (FoundDenominatorTerm) {
Qs.push_back(Op);
continue;
@ -7165,6 +7183,14 @@ public:
Qs.push_back(Op);
continue;
}
// Bail out if types do not match.
if (Ty != Q->getType()) {
Quotient = Zero;
Remainder = Numerator;
return;
}
FoundDenominatorTerm = true;
Qs.push_back(Q);
}