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[X86] Add FXSR intrinsics

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Add intrinsics for the FXSR instructions (FXSAVE/FXSAVE64/FXRSTOR/FXRSTOR64)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241049 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Michael Kuperstein 2015-06-30 08:49:35 +00:00
parent d6751a82b3
commit 501cad951b
4 changed files with 71 additions and 8 deletions
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13
include/llvm/IR/IntrinsicsX86.td
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@ -3514,6 +3514,19 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
Intrinsic<[], [llvm_i64_ty]>;
}
//===----------------------------------------------------------------------===//
// FXSR
let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_fxrstor : GCCBuiltin<"__builtin_ia32_fxrstor">,
Intrinsic<[], [llvm_ptr_ty], []>;
def int_x86_fxrstor64 : GCCBuiltin<"__builtin_ia32_fxrstor64">,
Intrinsic<[], [llvm_ptr_ty], []>;
def int_x86_fxsave : GCCBuiltin<"__builtin_ia32_fxsave">,
Intrinsic<[], [llvm_ptr_ty], []>;
def int_x86_fxsave64 : GCCBuiltin<"__builtin_ia32_fxsave64">,
Intrinsic<[], [llvm_ptr_ty], []>;
}
//===----------------------------------------------------------------------===//
// Half float conversion

16
lib/Target/X86/X86InstrFPStack.td
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@ -633,16 +633,16 @@ def FRNDINT : I<0xD9, MRM_FC, (outs), (ins), "frndint", [], IIC_FRNDINT>;
def FSCALE : I<0xD9, MRM_FD, (outs), (ins), "fscale", [], IIC_FSCALE>;
def FCOMPP : I<0xDE, MRM_D9, (outs), (ins), "fcompp", [], IIC_FCOMPP>;
def FXSAVE : I<0xAE, MRM0m, (outs opaque512mem:$dst), (ins),
"fxsave\t$dst", [], IIC_FXSAVE>, TB;
def FXSAVE64 : RI<0xAE, MRM0m, (outs opaque512mem:$dst), (ins),
"fxsave64\t$dst", [], IIC_FXSAVE>, TB,
Requires<[In64BitMode]>;
def FXSAVE : I<0xAE, MRM0m, (outs), (ins opaque512mem:$dst),
"fxsave\t$dst", [(int_x86_fxsave addr:$dst)], IIC_FXSAVE>, TB;
def FXSAVE64 : RI<0xAE, MRM0m, (outs), (ins opaque512mem:$dst),
"fxsave64\t$dst", [(int_x86_fxsave64 addr:$dst)],
IIC_FXSAVE>, TB, Requires<[In64BitMode]>;
def FXRSTOR : I<0xAE, MRM1m, (outs), (ins opaque512mem:$src),
"fxrstor\t$src", [], IIC_FXRSTOR>, TB;
"fxrstor\t$src", [(int_x86_fxrstor addr:$src)], IIC_FXRSTOR>, TB;
def FXRSTOR64 : RI<0xAE, MRM1m, (outs), (ins opaque512mem:$src),
"fxrstor64\t$src", [], IIC_FXRSTOR>, TB,
Requires<[In64BitMode]>;
"fxrstor64\t$src", [(int_x86_fxrstor64 addr:$src)],
IIC_FXRSTOR>, TB, Requires<[In64BitMode]>;
} // SchedRW
//===----------------------------------------------------------------------===//

33
test/CodeGen/X86/system-intrinsics-64.ll Normal file
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@ -0,0 +1,33 @@
; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
define void @test_fxsave(i8* %ptr) {
; CHECK-LABEL: test_fxsave
; CHECK: fxsave
call void @llvm.x86.fxsave(i8* %ptr)
ret void;
}
declare void @llvm.x86.fxsave(i8*)
define void @test_fxsave64(i8* %ptr) {
; CHECK-LABEL: test_fxsave64
; CHECK: fxsave64
call void @llvm.x86.fxsave64(i8* %ptr)
ret void;
}
declare void @llvm.x86.fxsave64(i8*)
define void @test_fxrstor(i8* %ptr) {
; CHECK-LABEL: test_fxrstor
; CHECK: fxrstor
call void @llvm.x86.fxrstor(i8* %ptr)
ret void;
}
declare void @llvm.x86.fxrstor(i8*)
define void @test_fxrstor64(i8* %ptr) {
; CHECK-LABEL: test_fxrstor64
; CHECK: fxrstor64
call void @llvm.x86.fxrstor64(i8* %ptr)
ret void;
}
declare void @llvm.x86.fxrstor64(i8*)

17
test/CodeGen/X86/system-intrinsics.ll Normal file
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@ -0,0 +1,17 @@
; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s
define void @test_fxsave(i8* %ptr) {
; CHECK-LABEL: test_fxsave
; CHECK: fxsave
call void @llvm.x86.fxsave(i8* %ptr)
ret void;
}
declare void @llvm.x86.fxsave(i8*)
define void @test_fxrstor(i8* %ptr) {
; CHECK-LABEL: test_fxrstor
; CHECK: fxrstor
call void @llvm.x86.fxrstor(i8* %ptr)
ret void;
}
declare void @llvm.x86.fxrstor(i8*)