6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-14 00:32:55 +00:00
Code Issues Projects Releases Wiki Activity

R600/SI: Add lit test coverage for the remaining patterns added recently

Browse Source 
Reviewed-by: Christian König <christian.koenig@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181775 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Michel Danzer 2013-05-14 09:53:30 +00:00
parent 847cb575a1
commit 5096dc74ae
6 changed files with 111 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

21
test/CodeGen/R600/llvm.AMDGPU.imax.ll Normal file
View File

@ -0,0 +1,21 @@
;RUN: llc < %s -march=r600 -mcpu=verde | FileCheck %s
;CHECK: V_MAX_I32_e32
define void @main(i32 %p0, i32 %p1) #0 {
main_body:
%0 = call i32 @llvm.AMDGPU.imax(i32 %p0, i32 %p1)
%1 = bitcast i32 %0 to float
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %1, float %1, float %1, float %1)
ret void
}
; Function Attrs: readnone
declare i32 @llvm.AMDGPU.imax(i32, i32) #1
declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
attributes #0 = { "ShaderType"="0" }
attributes #1 = { readnone }
!0 = metadata !{metadata !"const", null, i32 1}

21
test/CodeGen/R600/llvm.AMDGPU.imin.ll Normal file
View File

@ -0,0 +1,21 @@
;RUN: llc < %s -march=r600 -mcpu=verde | FileCheck %s
;CHECK: V_MIN_I32_e32
define void @main(i32 %p0, i32 %p1) #0 {
main_body:
%0 = call i32 @llvm.AMDGPU.imin(i32 %p0, i32 %p1)
%1 = bitcast i32 %0 to float
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %1, float %1, float %1, float %1)
ret void
}
; Function Attrs: readnone
declare i32 @llvm.AMDGPU.imin(i32, i32) #1
declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
attributes #0 = { "ShaderType"="0" }
attributes #1 = { readnone }
!0 = metadata !{metadata !"const", null, i32 1}

22
test/CodeGen/R600/llvm.AMDGPU.trunc.ll
View File

@ -1,16 +1,16 @@
;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=R600-CHECK %s
; RUN: llc < %s -march=r600 -mcpu=verde | FileCheck --check-prefix=SI-CHECK %s
;CHECK: TRUNC * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
; R600-CHECK: @amdgpu_trunc
; R600-CHECK: TRUNC * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
; SI-CHECK: @amdgpu_trunc
; SI-CHECK: V_TRUNC_F32
define void @test() {
%r0 = call float @llvm.R600.load.input(i32 0)
%r1 = call float @llvm.AMDGPU.trunc( float %r0)
call void @llvm.AMDGPU.store.output(float %r1, i32 0)
ret void
define void @amdgpu_trunc(float addrspace(1)* %out, float %x) {
entry:
%0 = call float @llvm.AMDGPU.trunc(float %x)
store float %0, float addrspace(1)* %out
ret void
}
declare float @llvm.R600.load.input(i32) readnone
declare void @llvm.AMDGPU.store.output(float, i32)
declare float @llvm.AMDGPU.trunc(float ) readnone

21
test/CodeGen/R600/llvm.AMDGPU.umax.ll Normal file
View File

@ -0,0 +1,21 @@
;RUN: llc < %s -march=r600 -mcpu=verde | FileCheck %s
;CHECK: V_MAX_U32_e32
define void @main(i32 %p0, i32 %p1) #0 {
main_body:
%0 = call i32 @llvm.AMDGPU.umax(i32 %p0, i32 %p1)
%1 = bitcast i32 %0 to float
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %1, float %1, float %1, float %1)
ret void
}
; Function Attrs: readnone
declare i32 @llvm.AMDGPU.umax(i32, i32) #1
declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
attributes #0 = { "ShaderType"="0" }
attributes #1 = { readnone }
!0 = metadata !{metadata !"const", null, i32 1}

21
test/CodeGen/R600/llvm.AMDGPU.umin.ll Normal file
View File

@ -0,0 +1,21 @@
;RUN: llc < %s -march=r600 -mcpu=verde | FileCheck %s
;CHECK: V_MIN_U32_e32
define void @main(i32 %p0, i32 %p1) #0 {
main_body:
%0 = call i32 @llvm.AMDGPU.umin(i32 %p0, i32 %p1)
%1 = bitcast i32 %0 to float
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %1, float %1, float %1, float %1)
ret void
}
; Function Attrs: readnone
declare i32 @llvm.AMDGPU.umin(i32, i32) #1
declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
attributes #0 = { "ShaderType"="0" }
attributes #1 = { readnone }
!0 = metadata !{metadata !"const", null, i32 1}

16
test/CodeGen/R600/uitofp.ll Normal file
View File

@ -0,0 +1,16 @@
;RUN: llc < %s -march=r600 -mcpu=verde | FileCheck %s
;CHECK: V_CVT_F32_U32_e32
define void @main(i32 %p) #0 {
main_body:
%0 = uitofp i32 %p to float
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %0, float %0, float %0, float %0)
ret void
}
declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
attributes #0 = { "ShaderType"="0" }
!0 = metadata !{metadata !"const", null, i32 1}