[mips] Define a function which returns the GPR register class.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178359 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Akira Hatanaka 2013-03-29 19:17:42 +00:00
parent bc4de7cec1
commit 5114226c18
5 changed files with 22 additions and 0 deletions

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@ -72,6 +72,12 @@ bool Mips16RegisterInfo::saveScavengerRegister
return true;
}
const TargetRegisterClass *
Mips16RegisterInfo::intRegClass(unsigned Size) const {
assert(Size == 4);
return &Mips::CPU16RegsRegClass;
}
void Mips16RegisterInfo::eliminateFI(MachineBasicBlock::iterator II,
unsigned OpNo, int FrameIndex,
uint64_t StackSize,

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@ -37,6 +37,8 @@ public:
const TargetRegisterClass *RC,
unsigned Reg) const;
virtual const TargetRegisterClass *intRegClass(unsigned Size) const;
private:
virtual void eliminateFI(MachineBasicBlock::iterator II, unsigned OpNo,
int FrameIndex, uint64_t StackSize,

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@ -68,6 +68,9 @@ public:
unsigned getEHExceptionRegister() const;
unsigned getEHHandlerRegister() const;
/// \brief Return GPR register class.
virtual const TargetRegisterClass *intRegClass(unsigned Size) const = 0;
private:
virtual void eliminateFI(MachineBasicBlock::iterator II, unsigned OpNo,
int FrameIndex, uint64_t StackSize,

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@ -54,6 +54,15 @@ requiresFrameIndexScavenging(const MachineFunction &MF) const {
return true;
}
const TargetRegisterClass *
MipsSERegisterInfo::intRegClass(unsigned Size) const {
if (Size == 4)
return &Mips::CPURegsRegClass;
assert(Size == 8);
return &Mips::CPU64RegsRegClass;
}
void MipsSERegisterInfo::eliminateFI(MachineBasicBlock::iterator II,
unsigned OpNo, int FrameIndex,
uint64_t StackSize,

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@ -31,6 +31,8 @@ public:
bool requiresFrameIndexScavenging(const MachineFunction &MF) const;
virtual const TargetRegisterClass *intRegClass(unsigned Size) const;
private:
virtual void eliminateFI(MachineBasicBlock::iterator II, unsigned OpNo,
int FrameIndex, uint64_t StackSize,