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[mips] Define a function which returns the GPR register class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178359 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -72,6 +72,12 @@ bool Mips16RegisterInfo::saveScavengerRegister
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return true;
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}
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const TargetRegisterClass *
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Mips16RegisterInfo::intRegClass(unsigned Size) const {
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assert(Size == 4);
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return &Mips::CPU16RegsRegClass;
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}
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void Mips16RegisterInfo::eliminateFI(MachineBasicBlock::iterator II,
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unsigned OpNo, int FrameIndex,
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uint64_t StackSize,
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@ -37,6 +37,8 @@ public:
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const TargetRegisterClass *RC,
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unsigned Reg) const;
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virtual const TargetRegisterClass *intRegClass(unsigned Size) const;
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private:
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virtual void eliminateFI(MachineBasicBlock::iterator II, unsigned OpNo,
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int FrameIndex, uint64_t StackSize,
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@ -68,6 +68,9 @@ public:
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unsigned getEHExceptionRegister() const;
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unsigned getEHHandlerRegister() const;
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/// \brief Return GPR register class.
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virtual const TargetRegisterClass *intRegClass(unsigned Size) const = 0;
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private:
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virtual void eliminateFI(MachineBasicBlock::iterator II, unsigned OpNo,
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int FrameIndex, uint64_t StackSize,
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@ -54,6 +54,15 @@ requiresFrameIndexScavenging(const MachineFunction &MF) const {
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return true;
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}
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const TargetRegisterClass *
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MipsSERegisterInfo::intRegClass(unsigned Size) const {
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if (Size == 4)
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return &Mips::CPURegsRegClass;
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assert(Size == 8);
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return &Mips::CPU64RegsRegClass;
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}
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void MipsSERegisterInfo::eliminateFI(MachineBasicBlock::iterator II,
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unsigned OpNo, int FrameIndex,
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uint64_t StackSize,
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@ -31,6 +31,8 @@ public:
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bool requiresFrameIndexScavenging(const MachineFunction &MF) const;
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virtual const TargetRegisterClass *intRegClass(unsigned Size) const;
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private:
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virtual void eliminateFI(MachineBasicBlock::iterator II, unsigned OpNo,
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int FrameIndex, uint64_t StackSize,
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