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Improve on r192635, ExeDepsFix for avx, and add a test case.
rdar:15221834 False AVX register dependencies cause 5x slowdown on flops-5/6 and significant slowdown on several others. This was blocking the switch to MI-Sched. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192669 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -557,6 +557,9 @@ void ExeDepsFix::processUndefReads(MachineBasicBlock *MBB) {
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for (MachineBasicBlock::reverse_iterator I = MBB->rbegin(), E = MBB->rend();
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I != E; ++I) {
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// Update liveness, including the current instrucion's defs.
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LiveUnits.stepBackward(*I, *TRI);
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if (UndefMI == &*I) {
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if (!LiveUnits.contains(UndefMI->getOperand(OpIdx).getReg(), *TRI))
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TII->breakPartialRegDependency(UndefMI, OpIdx, TRI);
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@ -568,7 +571,6 @@ void ExeDepsFix::processUndefReads(MachineBasicBlock *MBB) {
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UndefMI = UndefReads.back().first;
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OpIdx = UndefReads.back().second;
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}
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LiveUnits.stepBackward(*I, *TRI);
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}
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}
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29
test/CodeGen/X86/break-avx-dep.ll
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29
test/CodeGen/X86/break-avx-dep.ll
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@ -0,0 +1,29 @@
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; RUN: llc < %s -march=x86-64 -mattr=+avx | FileCheck %s
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;
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; rdar:15221834 False AVX register dependencies cause 5x slowdown on
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; flops-6. Make sure the unused register read by vcvtsi2sdq is zeroed
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; to avoid cyclic dependence on a write to the same register in a
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; previous iteration.
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; CHECK-LABEL: t1:
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; CHECK-LABEL: %loop
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; CHECK: vxorps %[[REG:xmm.]], %{{xmm.}}, %{{xmm.}}
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; CHECK: vcvtsi2sdq %{{r..}}, %[[REG]], %{{xmm.}}
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define i64 @t1(i64* nocapture %x, double* nocapture %y) nounwind {
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entry:
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%vx = load i64* %x
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br label %loop
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loop:
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%i = phi i64 [ 1, %entry ], [ %inc, %loop ]
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%s1 = phi i64 [ %vx, %entry ], [ %s2, %loop ]
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%fi = sitofp i64 %i to double
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%vy = load double* %y
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%fipy = fadd double %fi, %vy
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%iipy = fptosi double %fipy to i64
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%s2 = add i64 %s1, %iipy
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%inc = add nsw i64 %i, 1
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%exitcond = icmp eq i64 %inc, 156250000
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br i1 %exitcond, label %ret, label %loop
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ret:
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ret i64 %s2
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}
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