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Fix logic inversion for RI-mode address selection

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76052 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Anton Korobeynikov 2009-07-16 14:31:14 +00:00
parent 9419a0d13d
commit 54681eca69
2 changed files with 33 additions and 1 deletions
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2
lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
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@ -241,7 +241,7 @@ bool SystemZDAGToDAGISel::MatchAddress(SDValue N, SystemZRRIAddressMode &AM,
break;
}
// Test if the index field is free for use.
if (AM.IndexReg.getNode() && !AM.isRI) {
if (AM.IndexReg.getNode() || AM.isRI) {
AM = Backup;
break;
}

32
test/CodeGen/SystemZ/2009-07-11-InvalidRIISel.ll Normal file
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@ -0,0 +1,32 @@
; RUN: llvm-as < %s | llc
target datalayout = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16"
target triple = "s390x-linux"
define signext i32 @dfg_parse() nounwind {
entry:
br i1 undef, label %if.then2208, label %if.else2360
if.then2208: ; preds = %entry
br i1 undef, label %bb.nph3189, label %for.end2270
bb.nph3189: ; preds = %if.then2208
unreachable
for.end2270: ; preds = %if.then2208
%call2279 = call i64 @strlen(i8* undef) nounwind ; <i64> [#uses=1]
%add2281 = add i64 0, %call2279 ; <i64> [#uses=1]
%tmp2283 = trunc i64 %add2281 to i32 ; <i32> [#uses=1]
%tmp2284 = alloca i8, i32 %tmp2283, align 2 ; <i8*> [#uses=1]
%yyd.0.i2561.13 = getelementptr i8* %tmp2284, i64 13 ; <i8*> [#uses=1]
store i8 117, i8* %yyd.0.i2561.13
br label %while.cond.i2558
while.cond.i2558: ; preds = %while.cond.i2558, %for.end2270
br label %while.cond.i2558
if.else2360: ; preds = %entry
unreachable
}
declare i64 @strlen(i8* nocapture) nounwind readonly