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Fix logic inversion for RI-mode address selection
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76052 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -241,7 +241,7 @@ bool SystemZDAGToDAGISel::MatchAddress(SDValue N, SystemZRRIAddressMode &AM,
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break;
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}
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// Test if the index field is free for use.
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if (AM.IndexReg.getNode() && !AM.isRI) {
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if (AM.IndexReg.getNode() || AM.isRI) {
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AM = Backup;
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break;
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}
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32
test/CodeGen/SystemZ/2009-07-11-InvalidRIISel.ll
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32
test/CodeGen/SystemZ/2009-07-11-InvalidRIISel.ll
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@ -0,0 +1,32 @@
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; RUN: llvm-as < %s | llc
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target datalayout = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16"
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target triple = "s390x-linux"
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define signext i32 @dfg_parse() nounwind {
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entry:
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br i1 undef, label %if.then2208, label %if.else2360
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if.then2208: ; preds = %entry
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br i1 undef, label %bb.nph3189, label %for.end2270
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bb.nph3189: ; preds = %if.then2208
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unreachable
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for.end2270: ; preds = %if.then2208
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%call2279 = call i64 @strlen(i8* undef) nounwind ; <i64> [#uses=1]
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%add2281 = add i64 0, %call2279 ; <i64> [#uses=1]
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%tmp2283 = trunc i64 %add2281 to i32 ; <i32> [#uses=1]
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%tmp2284 = alloca i8, i32 %tmp2283, align 2 ; <i8*> [#uses=1]
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%yyd.0.i2561.13 = getelementptr i8* %tmp2284, i64 13 ; <i8*> [#uses=1]
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store i8 117, i8* %yyd.0.i2561.13
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br label %while.cond.i2558
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while.cond.i2558: ; preds = %while.cond.i2558, %for.end2270
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br label %while.cond.i2558
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if.else2360: ; preds = %entry
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unreachable
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}
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declare i64 @strlen(i8* nocapture) nounwind readonly
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