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Rename MachineCodeForBasicBlock to MachineBasicBlock

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4318 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
2002-10-28 01:41:47 +00:00
parent 32be9f6cd4
commit 55291ead55
16 changed files with 81 additions and 93 deletions
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lib/CodeGen/InstrSched/InstrScheduling.cpp
+7 -7
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@@ -8,7 +8,7 @@
#include "SchedPriorities.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineCodeForInstruction.h"
#include "llvm/CodeGen/MachineCodeForBasicBlock.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h" // FIXME: Remove when modularized better
#include "llvm/Target/TargetMachine.h"
@@ -631,14 +631,14 @@ AssignInstructionsToSlots(class SchedulingManager& S, unsigned maxIssue)
static void
RecordSchedule(const BasicBlock* bb, const SchedulingManager& S)
{
MachineCodeForBasicBlock& mvec = MachineCodeForBasicBlock::get(bb);
MachineBasicBlock& mvec = MachineBasicBlock::get(bb);
const MachineInstrInfo& mii = S.schedInfo.getInstrInfo();
#ifndef NDEBUG
// Lets make sure we didn't lose any instructions, except possibly
// some NOPs from delay slots. Also, PHIs are not included in the schedule.
unsigned numInstr = 0;
for (MachineCodeForBasicBlock::iterator I=mvec.begin(); I != mvec.end(); ++I)
for (MachineBasicBlock::iterator I=mvec.begin(); I != mvec.end(); ++I)
if (! mii.isNop((*I)->getOpCode()) &&
! mii.isDummyPhiInstr((*I)->getOpCode()))
++numInstr;
@@ -650,7 +650,7 @@ RecordSchedule(const BasicBlock* bb, const SchedulingManager& S)
return; // empty basic block!
// First find the dummy instructions at the start of the basic block
MachineCodeForBasicBlock::iterator I = mvec.begin();
MachineBasicBlock::iterator I = mvec.begin();
for ( ; I != mvec.end(); ++I)
if (! mii.isDummyPhiInstr((*I)->getOpCode()))
break;
@@ -1220,7 +1220,7 @@ ReplaceNopsWithUsefulInstr(SchedulingManager& S,
// fill delay slots, otherwise, just discard them.
//
unsigned int firstDelaySlotIdx = node->getOrigIndexInBB() + 1;
MachineCodeForBasicBlock& bbMvec = MachineCodeForBasicBlock::get(node->getBB());
MachineBasicBlock& bbMvec = MachineBasicBlock::get(node->getBB());
assert(bbMvec[firstDelaySlotIdx - 1] == brInstr &&
"Incorrect instr. index in basic block for brInstr");
@@ -1325,8 +1325,8 @@ ChooseInstructionsForDelaySlots(SchedulingManager& S,
// Simply passing in an empty delayNodeVec will have this effect.
//
delayNodeVec.clear();
const MachineCodeForBasicBlock& bbMvec = MachineCodeForBasicBlock::get(bb);
for (unsigned i=0; i < bbMvec.size(); i++)
const MachineBasicBlock& bbMvec = MachineBasicBlock::get(bb);
for (unsigned i=0; i < bbMvec.size(); ++i)
if (bbMvec[i] != brInstr &&
mii.getNumDelaySlots(bbMvec[i]->getOpCode()) > 0)
{