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https://github.com/c64scene-ar/llvm-6502.git
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Move the GlobalBaseReg field out of X86ISelDAGToDAG.cpp
and X86FastISel.cpp into X86MachineFunction.h, so that it can be shared, instead of having each selector keep track of its own. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56825 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -40,10 +40,6 @@ class X86FastISel : public FastISel {
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///
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unsigned StackPtr;
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/// GlobalBaseReg - keeps track of the virtual register mapped onto global
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/// base register.
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unsigned GlobalBaseReg;
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/// X86ScalarSSEf32, X86ScalarSSEf64 - Select between SSE or x87
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/// floating point ops.
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/// When SSE is available, use it for f32 operations.
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@ -60,7 +56,6 @@ public:
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: FastISel(mf, mmi, vm, bm, am) {
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Subtarget = &TM.getSubtarget<X86Subtarget>();
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StackPtr = Subtarget->is64Bit() ? X86::RSP : X86::ESP;
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GlobalBaseReg = 0;
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X86ScalarSSEf64 = Subtarget->hasSSE2();
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X86ScalarSSEf32 = Subtarget->hasSSE1();
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}
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@ -103,8 +98,6 @@ private:
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CCAssignFn *CCAssignFnForCall(unsigned CC, bool isTailCall = false);
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unsigned getGlobalBaseReg();
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const X86InstrInfo *getInstrInfo() const {
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return getTargetMachine()->getInstrInfo();
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}
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@ -152,16 +145,6 @@ bool X86FastISel::isTypeLegal(const Type *Ty, const TargetLowering &TLI,
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return (AllowI1 && VT == MVT::i1) || TLI.isTypeLegal(VT);
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}
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/// getGlobalBaseReg - Return the the global base register. Output
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/// instructions required to initialize the global base register, if necessary.
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///
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unsigned X86FastISel::getGlobalBaseReg() {
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assert(!Subtarget->is64Bit() && "X86-64 PIC uses RIP relative addressing");
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if (!GlobalBaseReg)
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GlobalBaseReg = getInstrInfo()->initializeGlobalBaseReg(MBB->getParent());
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return GlobalBaseReg;
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}
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#include "X86GenCallingConv.inc"
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/// CCAssignFnForCall - Selects the correct CCAssignFn for a given calling
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@ -433,7 +416,7 @@ bool X86FastISel::X86SelectAddress(Value *V, X86AddressMode &AM, bool isCall) {
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if (!isCall &&
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TM.getRelocationModel() == Reloc::PIC_ &&
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!Subtarget->is64Bit())
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AM.Base.Reg = getGlobalBaseReg();
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AM.Base.Reg = getInstrInfo()->getGlobalBaseReg(&MF);
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// Emit an extra load if the ABI requires it.
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if (Subtarget->GVRequiresExtraLoad(GV, TM, isCall)) {
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@ -1042,7 +1025,7 @@ bool X86FastISel::X86SelectCall(Instruction *I) {
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TM.getRelocationModel() == Reloc::PIC_ &&
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Subtarget->isPICStyleGOT()) {
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TargetRegisterClass *RC = X86::GR32RegisterClass;
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unsigned Base = getGlobalBaseReg();
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unsigned Base = getInstrInfo()->getGlobalBaseReg(&MF);
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bool Emitted = TII.copyRegToReg(*MBB, MBB->end(), X86::EBX, Base, RC, RC);
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assert(Emitted && "Failed to emit a copy instruction!");
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}
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@ -123,10 +123,6 @@ namespace {
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/// make the right decision when generating code for different targets.
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const X86Subtarget *Subtarget;
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/// GlobalBaseReg - keeps track of the virtual register mapped onto global
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/// base register.
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unsigned GlobalBaseReg;
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/// CurBB - Current BB being isel'd.
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///
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MachineBasicBlock *CurBB;
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@ -143,12 +139,6 @@ namespace {
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Subtarget(&TM.getSubtarget<X86Subtarget>()),
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OptForSize(OptimizeForSize) {}
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virtual bool runOnFunction(Function &Fn) {
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// Make sure we re-emit a set of the global base reg if necessary
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GlobalBaseReg = 0;
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return SelectionDAGISel::runOnFunction(Fn);
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}
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virtual const char *getPassName() const {
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return "X86 DAG->DAG Instruction Selection";
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}
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@ -1174,9 +1164,8 @@ bool X86DAGToDAGISel::TryFoldLoad(SDValue P, SDValue N,
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/// initialize the global base register, if necessary.
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///
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SDNode *X86DAGToDAGISel::getGlobalBaseReg() {
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assert(!Subtarget->is64Bit() && "X86-64 PIC uses RIP relative addressing");
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if (!GlobalBaseReg)
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GlobalBaseReg = TM.getInstrInfo()->initializeGlobalBaseReg(BB->getParent());
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MachineFunction *MF = CurBB->getParent();
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unsigned GlobalBaseReg = TM.getInstrInfo()->getGlobalBaseReg(MF);
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return CurDAG->getRegister(GlobalBaseReg, TLI.getPointerTy()).getNode();
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}
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@ -2947,10 +2947,19 @@ unsigned X86InstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const {
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return Size;
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}
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/// initializeGlobalBaseReg - Output the instructions required to put the
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/// base address to use for accessing globals into a register.
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/// getGlobalBaseReg - Return a virtual register initialized with the
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/// the global base register value. Output instructions required to
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/// initialize the register in the function entry block, if necessary.
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///
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unsigned X86InstrInfo::initializeGlobalBaseReg(MachineFunction *MF) const {
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unsigned X86InstrInfo::getGlobalBaseReg(MachineFunction *MF) const {
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assert(!TM.getSubtarget<X86Subtarget>().is64Bit() &&
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"X86-64 PIC uses RIP relative addressing");
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X86MachineFunctionInfo *X86FI = MF->getInfo<X86MachineFunctionInfo>();
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unsigned GlobalBaseReg = X86FI->getGlobalBaseReg();
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if (GlobalBaseReg != 0)
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return GlobalBaseReg;
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// Insert the set of GlobalBaseReg into the first MBB of the function
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MachineBasicBlock &FirstMBB = MF->front();
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MachineBasicBlock::iterator MBBI = FirstMBB.begin();
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@ -2966,12 +2975,14 @@ unsigned X86InstrInfo::initializeGlobalBaseReg(MachineFunction *MF) const {
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// not to pc, but to _GLOBAL_ADDRESS_TABLE_ external
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if (TM.getRelocationModel() == Reloc::PIC_ &&
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TM.getSubtarget<X86Subtarget>().isPICStyleGOT()) {
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unsigned GlobalBaseReg =
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GlobalBaseReg =
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RegInfo.createVirtualRegister(X86::GR32RegisterClass);
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BuildMI(FirstMBB, MBBI, TII->get(X86::ADD32ri), GlobalBaseReg)
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.addReg(PC).addExternalSymbol("_GLOBAL_OFFSET_TABLE_");
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return GlobalBaseReg;
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} else {
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GlobalBaseReg = PC;
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}
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return PC;
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X86FI->setGlobalBaseReg(GlobalBaseReg);
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return GlobalBaseReg;
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}
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@ -414,10 +414,11 @@ public:
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///
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virtual unsigned GetInstSizeInBytes(const MachineInstr *MI) const;
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/// initializeGlobalBaseReg - Output the instructions required to put the
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/// base address to use for accessing globals into a register.
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/// getGlobalBaseReg - Return a virtual register initialized with the
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/// the global base register value. Output instructions required to
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/// initialize the register in the function entry block, if necessary.
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///
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unsigned initializeGlobalBaseReg(MachineFunction *MF) const;
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unsigned getGlobalBaseReg(MachineFunction *MF) const;
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private:
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MachineInstr* foldMemoryOperand(MachineFunction &MF,
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@ -58,6 +58,10 @@ class X86MachineFunctionInfo : public MachineFunctionInfo {
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/// holds the virtual register into which the sret argument is passed.
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unsigned SRetReturnReg;
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/// GlobalBaseReg - keeps track of the virtual register mapped onto global
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/// base register.
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unsigned GlobalBaseReg;
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public:
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X86MachineFunctionInfo() : ForceFramePointer(false),
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CalleeSavedFrameSize(0),
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@ -65,7 +69,8 @@ public:
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DecorationStyle(None),
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ReturnAddrIndex(0),
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TailCallReturnAddrDelta(0),
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SRetReturnReg(0) {}
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SRetReturnReg(0),
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GlobalBaseReg(0) {}
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X86MachineFunctionInfo(MachineFunction &MF) : ForceFramePointer(false),
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CalleeSavedFrameSize(0),
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@ -73,7 +78,8 @@ public:
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DecorationStyle(None),
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ReturnAddrIndex(0),
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TailCallReturnAddrDelta(0),
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SRetReturnReg(0) {}
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SRetReturnReg(0),
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GlobalBaseReg(0) {}
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bool getForceFramePointer() const { return ForceFramePointer;}
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void setForceFramePointer(bool forceFP) { ForceFramePointer = forceFP; }
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@ -95,6 +101,9 @@ public:
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unsigned getSRetReturnReg() const { return SRetReturnReg; }
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void setSRetReturnReg(unsigned Reg) { SRetReturnReg = Reg; }
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unsigned getGlobalBaseReg() const { return GlobalBaseReg; }
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void setGlobalBaseReg(unsigned Reg) { GlobalBaseReg = Reg; }
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};
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} // End llvm namespace
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