6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-02-20 14:29:27 +00:00
Code Issues Projects Releases Wiki Activity

Teach MachineInstr::isRegTiedToDefOperand() to correctly parse inline asm operands.

Browse Source 
The inline asm operands must be parsed from the first flag, you cannot assume
that an immediate operand preceeding a register use operand is the flag.
PowerPC "m" operands are represented as (flag, imm, reg) triples.
isRegTiedToDefOperand() would incorrectly interpret the imm as the flag.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76101 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2009-07-16 20:58:34 +00:00
parent 5f15992b77
commit 57e599a46b
2 changed files with 28 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
lib/CodeGen/MachineInstr.cpp
View File

@ -783,16 +783,20 @@ isRegTiedToDefOperand(unsigned UseOpIdx, unsigned *DefOpIdx) const {
const MachineOperand &MO = getOperand(UseOpIdx);
if (!MO.isReg() || !MO.isUse() || MO.getReg() == 0)
return false;
int FlagIdx = UseOpIdx - 1;
if (FlagIdx < 1)
return false;
while (!getOperand(FlagIdx).isImm()) {
if (--FlagIdx == 0)
return false;
// Find the flag operand corresponding to UseOpIdx
unsigned FlagIdx, NumOps=0;
for (FlagIdx = 1; FlagIdx < UseOpIdx; FlagIdx += NumOps+1) {
const MachineOperand &UFMO = getOperand(FlagIdx);
assert(UFMO.isImm() && "Expecting flag operand on inline asm");
NumOps = InlineAsm::getNumOperandRegisters(UFMO.getImm());
assert(NumOps < getNumOperands() && "Invalid inline asm flag");
if (UseOpIdx < FlagIdx+NumOps+1)
break;
}
const MachineOperand &UFMO = getOperand(FlagIdx);
if (FlagIdx + InlineAsm::getNumOperandRegisters(UFMO.getImm()) < UseOpIdx)
if (FlagIdx >= UseOpIdx)
return false;
const MachineOperand &UFMO = getOperand(FlagIdx);
unsigned DefNo;
if (InlineAsm::isUseOperandTiedToDef(UFMO.getImm(), DefNo)) {
if (!DefOpIdx)

16
test/CodeGen/PowerPC/2009-07-16-InlineAsm-M-Operand.ll Normal file
View File

@ -0,0 +1,16 @@
; RUN: llvm-as < %s | llc -march=ppc32 -verify-machineinstrs
; Machine code verifier will call isRegTiedToDefOperand() on /all/ register use
; operands. We must make sure that the operand flag is found correctly.
; This test case is actually not specific to PowerPC, but the (imm, reg) format
; of PowerPC "m" operands trigger this bug.
define void @memory_asm_operand(i32 %a) {
; "m" operand will be represented as:
; INLINEASM <es:fake $0>, 10, %R2, 20, -4, %R1
; It is difficult to find the flag operand (20) when starting from %R1
call i32 asm "lbzx $0, $1", "=r,m" (i32 %a)
ret void
}