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Changed my mind. We now allow remat of instructions whose defs have subreg indices.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76100 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1157,11 +1157,6 @@ bool LiveIntervals::isReMaterializable(const LiveInterval &li,
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if (DisableReMat)
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return false;
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// FIXME: For now, avoid remating instructions whose definition has a subreg
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// index. It's just incredibly difficult to get right.
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if (MI->findRegisterDefOperand(li.reg)->getSubReg())
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return false;
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if (MI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF)
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return true;
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@ -490,7 +490,14 @@ static void ReMaterialize(MachineBasicBlock &MBB,
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const TargetInstrInfo *TII,
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const TargetRegisterInfo *TRI,
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VirtRegMap &VRM) {
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TII->reMaterialize(MBB, MII, DestReg, 0, VRM.getReMaterializedMI(Reg));
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MachineInstr *ReMatDefMI = VRM.getReMaterializedMI(Reg);
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#ifdef NDEBUG
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const TargetInstrDesc &TID = ReMatDefMI->getDesc();
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assert(TID.getNumDefs() != 1 &&
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"Don't know how to remat instructions that define > 1 values!");
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#endif
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TII->reMaterialize(MBB, MII, DestReg,
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ReMatDefMI->getOperand(0).getSubReg(), ReMatDefMI);
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MachineInstr *NewMI = prior(MII);
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for (unsigned i = 0, e = NewMI->getNumOperands(); i != e; ++i) {
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MachineOperand &MO = NewMI->getOperand(i);
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@ -1,10 +1,7 @@
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; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep movd | count 1
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; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep movq
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; PR2677
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; FIXME: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep movd | count 1
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; We now no longer allow instruction whose def has a sub-reg index to be
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; rematerialized.
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%struct.Bigint = type { %struct.Bigint*, i32, i32, i32, i32, [1 x i32] }
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