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[mips] Added a full set of instruction test cases for all ISA's (but not ASE's).

Browse Source 
Summary:
Where those ISA's are not currently supported, the test is run with the smallest
superset of that ISA.

Some instructions are valid but don't pass yet. These have been placed in the
valid-xfail.s's which will XPASS if _any_ instruction starts working.

The valid.s's do not verify the encoding yet. There are also no tests checking that instructions from neighbouring ISA's are not accepted.

Reviewers: matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D3214

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205180 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Daniel Sanders 2014-03-31 12:13:12 +00:00
parent 65fafbb109
commit 5900e1db41
18 changed files with 2280 additions and 0 deletions
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19
test/MC/Mips/mips1/valid-xfail.s Normal file
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# Instructions that should be valid but currently fail for known reasons (e.g.
# they aren't implemented yet).
# This test is set up to XPASS if any instruction generates an encoding.
#
# FIXME: Test MIPS-I instead of MIPS32
# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32 | not FileCheck %s
# CHECK-NOT: encoding
# XFAIL: *
.set noat
tlbp
tlbr
tlbwi
tlbwr
ehb
lwc0 c0_entrylo,-7321($s2)
lwc3 $10,-32265($k0)
ssnop
swc0 c0_prid,18904($s3)

83
test/MC/Mips/mips1/valid.s Normal file
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# Instructions that are valid
#
# FIXME: Test MIPS-I instead of MIPS32
# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32 | FileCheck %s
.set noat
abs.d $f7,$f25 # CHECK: encoding:
abs.s $f9,$f16
add $s7,$s2,$a1
add.d $f1,$f7,$f29
add.s $f8,$f21,$f24
addi $t5,$t1,26322
addu $t1,$a0,$a2
and $s7,$v0,$t4
c.ngl.d $f29,$f29
c.ngle.d $f0,$f16
c.sf.d $f30,$f0
c.sf.s $f14,$f22
cfc1 $s1,$21
ctc1 $a2,$26
cvt.d.s $f22,$f28
cvt.d.w $f26,$f11
cvt.s.d $f26,$f8
cvt.s.w $f22,$f15
cvt.w.d $f20,$f14
cvt.w.s $f20,$f24
div $zero,$t9,$t3
div.d $f29,$f20,$f27
div.s $f4,$f5,$f15
divu $zero,$t9,$t7
lb $t8,-14515($t2)
lbu $t0,30195($v1)
lh $t3,-8556($s5)
lhu $s3,-22851($v0)
li $at,-29773
li $zero,-29889
lw $t0,5674($a1)
lwc1 $f16,10225($k0)
lwc2 $18,-841($a2)
lwl $s4,-4231($t7)
lwr $zero,-19147($gp)
mfc1 $a3,$f27
mfhi $s3
mfhi $sp
mflo $s1
mov.d $f20,$f14
mov.s $f2,$f27
move $s8,$a0
move $t9,$a2
mtc1 $s8,$f9
mthi $s1
mtlo $sp
mtlo $t9
mul.d $f20,$f20,$f16
mul.s $f30,$f10,$f2
mult $sp,$s4
mult $sp,$v0
multu $gp,$k0
multu $t1,$s2
neg.d $f27,$f18
neg.s $f1,$f15
nop
nor $a3,$zero,$a3
or $t4,$s0,$sp
sb $s6,-19857($t6)
sh $t6,-6704($t7)
sllv $a3,$zero,$t1
slt $s7,$t3,$k1
slti $s1,$t2,9489
sltiu $t9,$t9,-15531
sltu $s4,$s5,$t3
srav $s1,$s7,$sp
srlv $t9,$s4,$a0
sub $s6,$s3,$t4
sub.d $f18,$f3,$f17
sub.s $f23,$f22,$f22
subu $sp,$s6,$s6
sw $ra,-10160($sp)
swc1 $f6,-8465($t8)
swc2 $25,24880($s0)
swl $t7,13694($s3)
swr $s1,-26590($t6)
xor $s2,$a0,$s8

19
test/MC/Mips/mips2/valid-xfail.s Normal file
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# Instructions that should be valid but currently fail for known reasons (e.g.
# they aren't implemented yet).
# This test is set up to XPASS if any instruction generates an encoding.
#
# FIXME: Test MIPS-II instead of MIPS32
# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32 | not FileCheck %s
# CHECK-NOT: encoding
# XFAIL: *
.set noat
ehb
ldc3 $29,-28645($s1)
lwc3 $10,-32265($k0)
sdc3 $12,5835($t2)
ssnop
tlbp
tlbr
tlbwi
tlbwr

105
test/MC/Mips/mips2/valid.s Normal file
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# Instructions that are valid
#
# FIXME: Test MIPS-II instead of MIPS32
# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32 | FileCheck %s
.set noat
abs.d $f7,$f25 # CHECK: encoding
abs.s $f9,$f16
add $s7,$s2,$a1
add.d $f1,$f7,$f29
add.s $f8,$f21,$f24
addi $t5,$t1,26322
addu $t1,$a0,$a2
and $s7,$v0,$t4
c.ngl.d $f29,$f29
c.ngle.d $f0,$f16
c.sf.d $f30,$f0
c.sf.s $f14,$f22
ceil.w.d $f11,$f25
ceil.w.s $f6,$f20
cfc1 $s1,$21
ctc1 $a2,$26
cvt.d.s $f22,$f28
cvt.d.w $f26,$f11
cvt.s.d $f26,$f8
cvt.s.w $f22,$f15
cvt.w.d $f20,$f14
cvt.w.s $f20,$f24
div $zero,$t9,$t3
div.d $f29,$f20,$f27
div.s $f4,$f5,$f15
divu $zero,$t9,$t7
floor.w.d $f14,$f11
floor.w.s $f8,$f9
lb $t8,-14515($t2)
lbu $t0,30195($v1)
ldc1 $f11,16391($s0)
ldc2 $8,-21181($at)
lh $t3,-8556($s5)
lhu $s3,-22851($v0)
li $at,-29773
li $zero,-29889
ll $v0,-7321($s2)
lw $t0,5674($a1)
lwc1 $f16,10225($k0)
lwc2 $18,-841($a2)
lwl $s4,-4231($t7)
lwr $zero,-19147($gp)
mfc1 $a3,$f27
mfhi $s3
mfhi $sp
mflo $s1
mov.d $f20,$f14
mov.s $f2,$f27
move $s8,$a0
move $t9,$a2
mtc1 $s8,$f9
mthi $s1
mtlo $sp
mtlo $t9
mul.d $f20,$f20,$f16
mul.s $f30,$f10,$f2
mult $sp,$s4
mult $sp,$v0
multu $gp,$k0
multu $t1,$s2
neg.d $f27,$f18
neg.s $f1,$f15
nop
nor $a3,$zero,$a3
or $t4,$s0,$sp
round.w.d $f6,$f4
round.w.s $f27,$f28
sb $s6,-19857($t6)
sc $t7,18904($s3)
sdc1 $f31,30574($t5)
sdc2 $20,23157($s2)
sh $t6,-6704($t7)
sllv $a3,$zero,$t1
slt $s7,$t3,$k1
slti $s1,$t2,9489
sltiu $t9,$t9,-15531
sltu $s4,$s5,$t3
sqrt.d $f17,$f22
sqrt.s $f0,$f1
srav $s1,$s7,$sp
srlv $t9,$s4,$a0
sub $s6,$s3,$t4
sub.d $f18,$f3,$f17
sub.s $f23,$f22,$f22
subu $sp,$s6,$s6
sw $ra,-10160($sp)
swc1 $f6,-8465($t8)
swc2 $25,24880($s0)
swl $t7,13694($s3)
swr $s1,-26590($t6)
teqi $s5,-17504
tgei $s1,5025
tgeiu $sp,-28621
tlti $t6,-21059
tltiu $ra,-5076
tnei $t4,-29647
trunc.w.d $f22,$f15
trunc.w.s $f28,$f30
xor $s2,$a0,$s8

21
test/MC/Mips/mips3/valid-xfail.s Normal file
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# Instructions that should be valid but currently fail for known reasons (e.g.
# they aren't implemented yet).
# This test is set up to XPASS if any instruction generates an encoding.
#
# FIXME: Test MIPS-III instead of MIPS64
# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips64 | not FileCheck %s
# CHECK-NOT: encoding
# XFAIL: *
.set noat
ddiv $zero,$k0,$s3
ddivu $zero,$s0,$s1
div $zero,$t9,$t3
divu $zero,$t9,$t7
ehb
lwc3 $10,-32265($k0)
ssnop
tlbp
tlbr
tlbwi
tlbwr

139
test/MC/Mips/mips3/valid.s Normal file
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# Instructions that are valid
#
# FIXME: Test MIPS-III instead of MIPS64
# RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64 | FileCheck %s
.set noat
abs.d $f7,$f25 # CHECK:encoding
abs.s $f9,$f16
add $s7,$s2,$a1
add.d $f1,$f7,$f29
add.s $f8,$f21,$f24
addi $t5,$t1,26322
addu $t1,$a0,$a2
and $s7,$v0,$t4
c.ngl.d $f29,$f29
c.ngle.d $f0,$f16
c.sf.d $f30,$f0
c.sf.s $f14,$f22
ceil.l.d $f1,$f3
ceil.l.s $f18,$f13
ceil.w.d $f11,$f25
ceil.w.s $f6,$f20
cfc1 $s1,$21
ctc1 $a2,$26
cvt.d.l $f4,$f16
cvt.d.s $f22,$f28
cvt.d.w $f26,$f11
cvt.l.d $f24,$f15
cvt.l.s $f11,$f29
cvt.s.d $f26,$f8
cvt.s.l $f15,$f30
cvt.s.w $f22,$f15
cvt.w.d $f20,$f14
cvt.w.s $f20,$f24
dadd $s3,$at,$ra
daddi $sp,$s4,-27705
daddiu $k0,$s6,-4586
div.d $f29,$f20,$f27
div.s $f4,$f5,$f15
dmfc1 $t4,$f13
dmtc1 $s0,$f14
dmult $s7,$t1
dmultu $a1,$a2
dsllv $zero,$s4,$t4
dsrav $gp,$s2,$s3
dsrlv $s3,$t6,$s4
dsub $a3,$s6,$t0
dsubu $a1,$a1,$k0
eret
floor.l.d $f26,$f7
floor.l.s $f12,$f5
floor.w.d $f14,$f11
floor.w.s $f8,$f9
lb $t8,-14515($t2)
lbu $t0,30195($v1)
ld $sp,-28645($s1)
ldc1 $f11,16391($s0)
ldc2 $8,-21181($at)
ldl $t8,-4167($t8)
ldr $t6,-30358($s4)
lh $t3,-8556($s5)
lhu $s3,-22851($v0)
li $at,-29773
li $zero,-29889
ll $v0,-7321($s2)
lld $zero,-14736($ra)
lw $t0,5674($a1)
lwc1 $f16,10225($k0)
lwc2 $18,-841($a2)
lwl $s4,-4231($t7)
lwr $zero,-19147($gp)
lwu $s3,-24086($v1)
mfc1 $a3,$f27
mfhi $s3
mfhi $sp
mflo $s1
mov.d $f20,$f14
mov.s $f2,$f27
move $a0,$a3
move $s5,$a0
move $s8,$a0
move $t9,$a2
mtc1 $s8,$f9
mthi $s1
mtlo $sp
mtlo $t9
mul.d $f20,$f20,$f16
mul.s $f30,$f10,$f2
mult $sp,$s4
mult $sp,$v0
multu $gp,$k0
multu $t1,$s2
neg.d $f27,$f18
neg.s $f1,$f15
nop
nor $a3,$zero,$a3
or $t4,$s0,$sp
round.l.d $f12,$f1
round.l.s $f25,$f5
round.w.d $f6,$f4
round.w.s $f27,$f28
sb $s6,-19857($t6)
sc $t7,18904($s3)
scd $t7,-8243($sp)
sd $t4,5835($t2)
sdc1 $f31,30574($t5)
sdc2 $20,23157($s2)
sdl $a3,-20961($s8)
sdr $t3,-20423($t4)
sh $t6,-6704($t7)
sllv $a3,$zero,$t1
slt $s7,$t3,$k1
slti $s1,$t2,9489
sltiu $t9,$t9,-15531
sltu $s4,$s5,$t3
sqrt.d $f17,$f22
sqrt.s $f0,$f1
srav $s1,$s7,$sp
srlv $t9,$s4,$a0
sub $s6,$s3,$t4
sub.d $f18,$f3,$f17
sub.s $f23,$f22,$f22
subu $sp,$s6,$s6
sw $ra,-10160($sp)
swc1 $f6,-8465($t8)
swc2 $25,24880($s0)
swl $t7,13694($s3)
swr $s1,-26590($t6)
teqi $s5,-17504
tgei $s1,5025
tgeiu $sp,-28621
tlti $t6,-21059
tltiu $ra,-5076
tnei $t4,-29647
trunc.l.d $f23,$f23
trunc.l.s $f28,$f31
trunc.w.d $f22,$f15
trunc.w.s $f28,$f30
xor $s2,$a0,$s8

46
test/MC/Mips/mips32/valid-xfail.s Normal file
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# Instructions that should be valid but currently fail for known reasons (e.g.
# they aren't implemented yet).
# This test is set up to XPASS if any instruction generates an encoding.
#
# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32 | not FileCheck %s
# CHECK-NOT: encoding
# XFAIL: *
.set noat
c.eq.d $fcc1,$f15,$f15
c.eq.s $fcc5,$f24,$f17
c.f.d $fcc4,$f11,$f21
c.f.s $fcc4,$f30,$f7
c.le.d $fcc4,$f18,$f1
c.le.s $fcc6,$f24,$f4
c.lt.d $fcc3,$f9,$f3
c.lt.s $fcc2,$f17,$f14
c.nge.d $fcc5,$f21,$f16
c.nge.s $fcc3,$f11,$f8
c.ngl.s $fcc2,$f31,$f23
c.ngle.s $fcc2,$f18,$f23
c.ngt.d $fcc4,$f24,$f7
c.ngt.s $fcc5,$f8,$f13
c.ole.d $fcc2,$f16,$f31
c.ole.s $fcc3,$f7,$f20
c.olt.d $fcc4,$f19,$f28
c.olt.s $fcc6,$f20,$f7
c.seq.d $fcc4,$f31,$f7
c.seq.s $fcc7,$f1,$f25
c.ueq.d $fcc4,$f13,$f25
c.ueq.s $fcc6,$f3,$f30
c.ule.d $fcc7,$f25,$f18
c.ule.s $fcc7,$f21,$f30
c.ult.d $fcc6,$f6,$f17
c.ult.s $fcc7,$f24,$f10
c.un.d $fcc6,$f23,$f24
c.un.s $fcc1,$f30,$f4
ehb
ldc3 $29,-28645($s1)
rorv $t5,$a3,$s5
sdc3 $12,5835($t2)
ssnop
tlbp
tlbr
tlbwi
tlbwr

129
test/MC/Mips/mips32/valid.s Normal file
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# Instructions that are valid
#
# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32 | FileCheck %s
.set noat
abs.d $f7,$f25 # CHECK: encoding
abs.s $f9,$f16
add $s7,$s2,$a1
add.d $f1,$f7,$f29
add.s $f8,$f21,$f24
addi $t5,$t1,26322
addu $t1,$a0,$a2
and $s7,$v0,$t4
c.ngl.d $f29,$f29
c.ngle.d $f0,$f16
c.sf.d $f30,$f0
c.sf.s $f14,$f22
ceil.w.d $f11,$f25
ceil.w.s $f6,$f20
cfc1 $s1,$21
clo $t3,$a1
clz $sp,$gp
ctc1 $a2,$26
cvt.d.s $f22,$f28
cvt.d.w $f26,$f11
cvt.s.d $f26,$f8
cvt.s.w $f22,$f15
cvt.w.d $f20,$f14
cvt.w.s $f20,$f24
deret
div $zero,$t9,$t3
div.d $f29,$f20,$f27
div.s $f4,$f5,$f15
divu $zero,$t9,$t7
eret
floor.w.d $f14,$f11
floor.w.s $f8,$f9
lb $t8,-14515($t2)
lbu $t0,30195($v1)
ldc1 $f11,16391($s0)
ldc2 $8,-21181($at)
lh $t3,-8556($s5)
lhu $s3,-22851($v0)
li $at,-29773
li $zero,-29889
ll $v0,-7321($s2)
lw $t0,5674($a1)
lwc1 $f16,10225($k0)
lwc2 $18,-841($a2)
lwl $s4,-4231($t7)
lwr $zero,-19147($gp)
madd $s6,$t5
madd $zero,$t1
maddu $s3,$gp
maddu $t8,$s2
mfc0 $a2,$14,1
mfc1 $a3,$f27
mfhi $s3
mfhi $sp
mflo $s1
mov.d $f20,$f14
mov.s $f2,$f27
move $s8,$a0
move $t9,$a2
movf $gp,$t0,$fcc7
movf.d $f6,$f11,$fcc5
movf.s $f23,$f5,$fcc6
movn $v1,$s1,$s0
movn.d $f27,$f21,$k0
movn.s $f12,$f0,$s7
movt $zero,$s4,$fcc5
movt.d $f0,$f2,$fcc0
movt.s $f30,$f2,$fcc1
movz $a1,$s6,$t1
movz.d $f12,$f29,$t1
movz.s $f25,$f7,$v1
msub $s7,$k1
msubu $t7,$a1
mtc0 $t1,$29,3
mtc1 $s8,$f9
mthi $s1
mtlo $sp
mtlo $t9
mul $s0,$s4,$at
mul.d $f20,$f20,$f16
mul.s $f30,$f10,$f2
mult $sp,$s4
mult $sp,$v0
multu $gp,$k0
multu $t1,$s2
neg.d $f27,$f18
neg.s $f1,$f15
nop
nor $a3,$zero,$a3
or $t4,$s0,$sp
round.w.d $f6,$f4
round.w.s $f27,$f28
sb $s6,-19857($t6)
sc $t7,18904($s3)
sdc1 $f31,30574($t5)
sdc2 $20,23157($s2)
sh $t6,-6704($t7)
sllv $a3,$zero,$t1
slt $s7,$t3,$k1
slti $s1,$t2,9489
sltiu $t9,$t9,-15531
sltu $s4,$s5,$t3
sqrt.d $f17,$f22
sqrt.s $f0,$f1
srav $s1,$s7,$sp
srlv $t9,$s4,$a0
sub $s6,$s3,$t4
sub.d $f18,$f3,$f17
sub.s $f23,$f22,$f22
subu $sp,$s6,$s6
sw $ra,-10160($sp)
swc1 $f6,-8465($t8)
swc2 $25,24880($s0)
swl $t7,13694($s3)
swr $s1,-26590($t6)
teqi $s5,-17504
tgei $s1,5025
tgeiu $sp,-28621
tlti $t6,-21059
tltiu $ra,-5076
tnei $t4,-29647
trunc.w.d $f22,$f15
trunc.w.s $f28,$f30
xor $s2,$a0,$s8

332
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# Instructions that should be valid but currently fail for known reasons (e.g.
# they aren't implemented yet).
# This test is set up to XPASS if any instruction generates an encoding.
#
# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s
# CHECK-NOT: encoding
# XFAIL: *
.set noat
abs.ps $f22,$f8
absq_s.ph $t0,$a0
absq_s.qb $t7,$s1
absq_s.w $s3,$ra
add.ps $f25,$f27,$f13
addq.ph $s1,$t7,$at
addq_s.ph $s3,$s6,$s2
addq_s.w $a2,$t0,$at
addqh.ph $s4,$t6,$s1
addqh.w $s7,$s7,$k1
addqh_r.ph $sp,$t9,$s8
addqh_r.w $t0,$v1,$zero
addsc $s8,$t7,$t4
addu.ph $a2,$t6,$s3
addu.qb $s6,$v1,$v1
addu_s.ph $a3,$s3,$gp
addu_s.qb $s4,$s8,$s1
adduh.qb $a1,$a1,$at
adduh_r.qb $a0,$t1,$t4
addwc $k0,$s6,$s7
alnv.ps $f12,$f18,$f30,$t4
and.v $w10,$w25,$w29
bitrev $t6,$at
bmnz.v $w15,$w2,$w28
bmz.v $w13,$w11,$w21
bsel.v $w28,$w7,$w0
c.eq.d $fcc1,$f15,$f15
c.eq.ps $fcc5,$f0,$f9
c.eq.s $fcc5,$f24,$f17
c.f.d $fcc4,$f11,$f21
c.f.ps $fcc6,$f11,$f11
c.f.s $fcc4,$f30,$f7
c.le.d $fcc4,$f18,$f1
c.le.ps $fcc1,$f7,$f20
c.le.s $fcc6,$f24,$f4
c.lt.d $fcc3,$f9,$f3
c.lt.ps $f19,$f5
c.lt.s $fcc2,$f17,$f14
c.nge.d $fcc5,$f21,$f16
c.nge.ps $f1,$f26
c.nge.s $fcc3,$f11,$f8
c.ngl.d $f29,$f29
c.ngl.ps $f21,$f30
c.ngl.s $fcc2,$f31,$f23
c.ngle.ps $fcc7,$f12,$f20
c.ngle.s $fcc2,$f18,$f23
c.ngt.d $fcc4,$f24,$f7
c.ngt.ps $fcc5,$f30,$f6
c.ngt.s $fcc5,$f8,$f13
c.ole.d $fcc2,$f16,$f31
c.ole.ps $fcc7,$f21,$f8
c.ole.s $fcc3,$f7,$f20
c.olt.d $fcc4,$f19,$f28
c.olt.ps $fcc3,$f7,$f16
c.olt.s $fcc6,$f20,$f7
c.seq.d $fcc4,$f31,$f7
c.seq.ps $fcc6,$f31,$f14
c.seq.s $fcc7,$f1,$f25
c.sf.ps $fcc6,$f4,$f6
c.sf.s $f14,$f22
c.ueq.d $fcc4,$f13,$f25
c.ueq.ps $fcc1,$f5,$f29
c.ueq.s $fcc6,$f3,$f30
c.ule.d $fcc7,$f25,$f18
c.ule.ps $fcc6,$f17,$f3
c.ule.s $fcc7,$f21,$f30
c.ult.d $fcc6,$f6,$f17
c.ult.ps $fcc7,$f14,$f0
c.ult.s $fcc7,$f24,$f10
c.un.d $fcc6,$f23,$f24
c.un.ps $fcc4,$f2,$f26
c.un.s $fcc1,$f30,$f4
ceil.l.d $f1,$f3
ceil.l.s $f18,$f13
cfcmsa $s6,$19
cmp.eq.ph $s7,$t6
cmp.le.ph $t0,$t6
cmp.lt.ph $k0,$sp
cmpgdu.eq.qb $s3,$zero,$k0
cmpgdu.le.qb $v1,$t7,$s2
cmpgdu.lt.qb $s0,$gp,$sp
cmpgu.eq.qb $t6,$s6,$s8
cmpgu.le.qb $t1,$a3,$s4
cmpgu.lt.qb $sp,$at,$t0
cmpu.eq.qb $v0,$t8
cmpu.le.qb $s1,$a1
cmpu.lt.qb $at,$a3
ctcmsa $31,$s7
cvt.d.l $f4,$f16
cvt.l.d $f24,$f15
cvt.l.s $f11,$f29
cvt.ps.s $f3,$f18,$f19
cvt.s.l $f15,$f30
cvt.s.pl $f30,$f1
cvt.s.pu $f14,$f25
div $zero,$t9,$t3
divu $zero,$t9,$t7
dmt $k0
dpa.w.ph $ac1,$s7,$k0
dpaq_s.w.ph $ac2,$a0,$t5
dpaq_sa.l.w $ac0,$a2,$t6
dpaqx_s.w.ph $ac3,$a0,$t8
dpaqx_sa.w.ph $ac1,$zero,$s5
dpau.h.qbl $ac1,$t2,$t8
dpau.h.qbr $ac1,$s7,$s6
dpax.w.ph $ac3,$a0,$k0
dps.w.ph $ac1,$a3,$a1
dpsq_s.w.ph $ac0,$gp,$k0
dpsq_sa.l.w $ac0,$a3,$t7
dpsqx_s.w.ph $ac3,$t5,$a3
dpsqx_sa.w.ph $ac3,$sp,$s2
dpsu.h.qbl $ac2,$t6,$t2
dpsu.h.qbr $ac2,$a1,$s6
dpsx.w.ph $ac0,$s7,$gp
dvpe $s6
ehb
emt $t0
evpe $v0
extpdpv $s6,$ac0,$s8
extpv $t5,$ac0,$t6
extrv.w $t0,$ac3,$at
extrv_r.w $t0,$ac1,$s6
extrv_rs.w $gp,$ac1,$s6
extrv_s.h $s2,$ac1,$t6
fclass.d $w14,$w27
fclass.w $w19,$w28
fexupl.d $w10,$w29
fexupl.w $w12,$w27
fexupr.d $w31,$w15
fexupr.w $w29,$w12
ffint_s.d $w1,$w30
ffint_s.w $w16,$w14
ffint_u.d $w23,$w18
ffint_u.w $w19,$w12
ffql.d $w2,$w3
ffql.w $w9,$w0
ffqr.d $w25,$w24
ffqr.w $w10,$w6
fill.b $w9,$v1
fill.h $w9,$t0
fill.w $w31,$t7
flog2.d $w12,$w16
flog2.w $w19,$w23
floor.l.d $f26,$f7
floor.l.s $f12,$f5
floor.w.d $f14,$f11
floor.w.s $f8,$f9
fork $s2,$t0,$a0
frcp.d $w12,$w4
frcp.w $w30,$w8
frint.d $w20,$w8
frint.w $w11,$w29
frsqrt.d $w29,$w2
frsqrt.w $w9,$w8
fsqrt.d $w3,$w1
fsqrt.w $w5,$w15
ftint_s.d $w31,$w26
ftint_s.w $w27,$w14
ftint_u.d $w5,$w31
ftint_u.w $w12,$w29
ftrunc_s.d $w4,$w22
ftrunc_s.w $w24,$w7
ftrunc_u.d $w20,$w25
ftrunc_u.w $w7,$w26
insv $s2,$at
iret
lbe $t6,122($t1)
lbue $t3,-108($t2)
lbux $t1,$t6($v0)
ldc3 $29,-28645($s1)
lhe $s6,219($v1)
lhue $gp,118($t3)
lhx $sp,$k0($t7)
lle $gp,-237($ra)
lwe $ra,-145($t6)
lwle $t3,-42($t3)
lwre $sp,-152($t8)
lwx $t4,$t4($s4)
madd.ps $f22,$f3,$f14,$f3
maq_s.w.phl $ac2,$t9,$t3
maq_s.w.phr $ac0,$t2,$t9
maq_sa.w.phl $ac3,$a1,$v1
maq_sa.w.phr $ac1,$at,$t2
mfgc0 $s6,c0_datahi1
mflo $t1,$ac2
modsub $a3,$t4,$a3
mov.ps $f22,$f17
move.v $w8,$w17
movf.ps $f10,$f28,$fcc6
movn.ps $f31,$f31,$s3
movt.ps $f20,$f25,$fcc2
movz.ps $f18,$f17,$ra
msub $ac2,$sp,$t6
msub.ps $f12,$f14,$f29,$f17
msubu $ac2,$a1,$t8
mtc0 $t1,c0_datahi1
mtgc0 $s4,$21,7
mthi $v0,$ac1
mthlip $a3,$ac0
mul.ph $s4,$t8,$s0
mul.ps $f14,$f0,$f16
mul_s.ph $t2,$t6,$t7
muleq_s.w.phl $t3,$s4,$s4
muleq_s.w.phr $s6,$a0,$s8
muleu_s.ph.qbl $a2,$t6,$t0
muleu_s.ph.qbr $a1,$ra,$t1
mulq_rs.ph $s2,$t6,$t7
mulq_rs.w $at,$s4,$t9
mulq_s.ph $s0,$k1,$t7
mulq_s.w $t1,$a3,$s0
mulsa.w.ph $ac1,$s4,$s6
mulsaq_s.w.ph $ac0,$ra,$s2
neg.ps $f19,$f13
nloc.b $w12,$w30
nloc.d $w16,$w7
nloc.h $w21,$w17
nloc.w $w17,$w16
nlzc.b $w12,$w7
nlzc.d $w14,$w14
nlzc.h $w24,$w24
nlzc.w $w10,$w4
nmadd.d $f18,$f9,$f14,$f19
nmadd.ps $f27,$f4,$f9,$f25
nmadd.s $f0,$f5,$f25,$f12
nmsub.d $f30,$f8,$f16,$f30
nmsub.ps $f6,$f12,$f14,$f17
nmsub.s $f1,$f24,$f19,$f4
nor.v $w20,$w20,$w15
or.v $w13,$w23,$w12
packrl.ph $ra,$t8,$t6
pause
pcnt.b $w30,$w15
pcnt.d $w5,$w16
pcnt.h $w20,$w24
pcnt.w $w22,$w20
pick.ph $ra,$a2,$gp
pick.qb $t3,$a0,$gp
pll.ps $f25,$f9,$f30
plu.ps $f1,$f26,$f29
preceq.w.phl $s8,$gp
preceq.w.phr $s5,$t7
precequ.ph.qbl $s7,$ra
precequ.ph.qbla $a0,$t1
precequ.ph.qbr $ra,$s3
precequ.ph.qbra $t8,$t0
preceu.ph.qbl $sp,$t0
preceu.ph.qbla $s6,$t3
preceu.ph.qbr $gp,$s1
preceu.ph.qbra $k1,$s0
precr.qb.ph $v0,$t4,$s8
precrq.ph.w $t6,$s8,$t8
precrq.qb.ph $a2,$t4,$t4
precrq_rs.ph.w $a1,$k0,$a3
precrqu_s.qb.ph $zero,$gp,$s5
pul.ps $f9,$f30,$f26
puu.ps $f24,$f9,$f2
raddu.w.qb $t9,$s3
rdhwr $sp,$11
rdpgpr $s3,$t1
recip.d $f19,$f6
recip.s $f3,$f30
repl.ph $at,-307
replv.ph $v1,$s7
replv.qb $t9,$t4
rorv $t5,$a3,$s5
round.l.d $f12,$f1
round.l.s $f25,$f5
rsqrt.d $f3,$f28
rsqrt.s $f4,$f8
sbe $s7,33($s1)
sce $sp,189($t2)
sdc3 $12,5835($t2)
she $t8,105($v0)
shilo $ac1,26
shilov $ac2,$t2
shllv.ph $t2,$s0,$s0
shllv.qb $gp,$v1,$zero
shllv_s.ph $k1,$at,$t5
shllv_s.w $s1,$ra,$k0
shrav.ph $t9,$s2,$s1
shrav.qb $zero,$t8,$t3
shrav_r.ph $s3,$t3,$t9
shrav_r.qb $a0,$sp,$s5
shrav_r.w $s7,$s4,$s6
shrlv.ph $t6,$t2,$t1
shrlv.qb $a2,$s2,$t3
ssnop
sub.ps $f5,$f14,$f26
subq.ph $ra,$t1,$s8
subq_s.ph $t5,$s8,$s5
subq_s.w $k1,$a2,$a3
subqh.ph $t2,$at,$t1
subqh.w $v0,$a2,$zero
subqh_r.ph $a0,$t4,$s6
subqh_r.w $t2,$a2,$gp
subu.ph $t1,$s6,$s4
subu.qb $s6,$a2,$s6
subu_s.ph $v1,$a1,$s3
subu_s.qb $s1,$at,$ra
subuh.qb $zero,$gp,$gp
subuh_r.qb $s4,$s8,$s6
swe $t8,94($k0)
swle $v1,-209($gp)
swre $k0,-202($s2)
swxc1 $f19,$t4($k0)
synci 20023($s0)
tlbginv
tlbginvf
tlbgp
tlbgr
tlbgwi
tlbgwr
tlbinv
tlbinvf
tlbp
tlbr
tlbwi
tlbwr
trunc.l.d $f23,$f23
trunc.l.s $f28,$f31
wrpgpr $zero,$t5
xor.v $w20,$w21,$w30
yield $v1,$s0

138
test/MC/Mips/mips32r2/valid.s Normal file
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# Instructions that are valid
#
# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s
.set noat
abs.d $f7,$f25 # CHECK: encoding
abs.s $f9,$f16
add $s7,$s2,$a1
add.d $f1,$f7,$f29
add.s $f8,$f21,$f24
addi $t5,$t1,26322
addu $t1,$a0,$a2
and $s7,$v0,$t4
c.ngle.d $f0,$f16
c.sf.d $f30,$f0
ceil.w.d $f11,$f25
ceil.w.s $f6,$f20
cfc1 $s1,$21
clo $t3,$a1
clz $sp,$gp
ctc1 $a2,$26
cvt.d.s $f22,$f28
cvt.d.w $f26,$f11
cvt.s.d $f26,$f8
cvt.s.w $f22,$f15
cvt.w.d $f20,$f14
cvt.w.s $f20,$f24
deret
di $s8
div.d $f29,$f20,$f27
div.s $f4,$f5,$f15
ei $t6
eret
lb $t8,-14515($t2)
lbu $t0,30195($v1)
ldc1 $f11,16391($s0)
ldc2 $8,-21181($at)
ldxc1 $f8,$s7($t7)
lh $t3,-8556($s5)
lhu $s3,-22851($v0)
li $at,-29773
li $zero,-29889
ll $v0,-7321($s2)
luxc1 $f19,$s6($s5)
lw $t0,5674($a1)
lwc1 $f16,10225($k0)
lwc2 $18,-841($a2)
lwl $s4,-4231($t7)
lwr $zero,-19147($gp)
lwxc1 $f12,$s1($s8)
madd $s6,$t5
madd $zero,$t1
madd.d $f18,$f19,$f26,$f20
madd.s $f1,$f31,$f19,$f25
maddu $s3,$gp
maddu $t8,$s2
mfc0 $a2,$14,1
mfc1 $a3,$f27
mfhc1 $s8,$f24
mfhi $s3
mfhi $sp
mflo $s1
mov.d $f20,$f14
mov.s $f2,$f27
move $s8,$a0
move $t9,$a2
movf $gp,$t0,$fcc7
movf.d $f6,$f11,$fcc5
movf.s $f23,$f5,$fcc6
movn $v1,$s1,$s0
movn.d $f27,$f21,$k0
movn.s $f12,$f0,$s7
movt $zero,$s4,$fcc5
movt.d $f0,$f2,$fcc0
movt.s $f30,$f2,$fcc1
movz $a1,$s6,$t1
movz.d $f12,$f29,$t1
movz.s $f25,$f7,$v1
msub $s7,$k1
msub.d $f10,$f1,$f31,$f18
msub.s $f12,$f19,$f10,$f16
msubu $t7,$a1
mtc1 $s8,$f9
mthc1 $zero,$f16
mthi $s1
mtlo $sp
mtlo $t9
mul $s0,$s4,$at
mul.d $f20,$f20,$f16
mul.s $f30,$f10,$f2
mult $sp,$s4
mult $sp,$v0
multu $gp,$k0
multu $t1,$s2
neg.d $f27,$f18
neg.s $f1,$f15
nop
nor $a3,$zero,$a3
or $t4,$s0,$sp
round.w.d $f6,$f4
round.w.s $f27,$f28
sb $s6,-19857($t6)
sc $t7,18904($s3)
sdc1 $f31,30574($t5)
sdc2 $20,23157($s2)
sdxc1 $f11,$t2($t6)
seb $t9,$t7
seh $v1,$t4
sh $t6,-6704($t7)
sllv $a3,$zero,$t1
slt $s7,$t3,$k1
slti $s1,$t2,9489
sltiu $t9,$t9,-15531
sltu $s4,$s5,$t3
sqrt.d $f17,$f22
sqrt.s $f0,$f1
srav $s1,$s7,$sp
srlv $t9,$s4,$a0
sub $s6,$s3,$t4
sub.d $f18,$f3,$f17
sub.s $f23,$f22,$f22
subu $sp,$s6,$s6
suxc1 $f12,$k1($t5)
sw $ra,-10160($sp)
swc1 $f6,-8465($t8)
swc2 $25,24880($s0)
swl $t7,13694($s3)
swr $s1,-26590($t6)
teqi $s5,-17504
tgei $s1,5025
tgeiu $sp,-28621
tlti $t6,-21059
tltiu $ra,-5076
tnei $t4,-29647
trunc.w.d $f22,$f15
trunc.w.s $f28,$f30
wsbh $k1,$t1
xor $s2,$a0,$s8

60
test/MC/Mips/mips4/valid-xfail.s Normal file
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# Instructions that should be valid but currently fail for known reasons (e.g.
# they aren't implemented yet).
# This test is set up to XPASS if any instruction generates an encoding.
#
# FIXME: Test MIPS-IV instead of MIPS64
# RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64 | not FileCheck %s
# CHECK-NOT: encoding
# XFAIL: *
.set noat
c.eq.d $fcc1,$f15,$f15
c.eq.s $fcc5,$f24,$f17
c.f.d $fcc4,$f11,$f21
c.f.s $fcc4,$f30,$f7
c.le.d $fcc4,$f18,$f1
c.le.s $fcc6,$f24,$f4
c.lt.d $fcc3,$f9,$f3
c.lt.s $fcc2,$f17,$f14
c.nge.d $fcc5,$f21,$f16
c.nge.s $fcc3,$f11,$f8
c.ngl.s $fcc2,$f31,$f23
c.ngle.s $fcc2,$f18,$f23
c.ngt.d $fcc4,$f24,$f7
c.ngt.s $fcc5,$f8,$f13
c.ole.d $fcc2,$f16,$f31
c.ole.s $fcc3,$f7,$f20
c.olt.d $fcc4,$f19,$f28
c.olt.s $fcc6,$f20,$f7
c.seq.d $fcc4,$f31,$f7
c.seq.s $fcc7,$f1,$f25
c.ueq.d $fcc4,$f13,$f25
c.ueq.s $fcc6,$f3,$f30
c.ule.d $fcc7,$f25,$f18
c.ule.s $fcc7,$f21,$f30
c.ult.d $fcc6,$f6,$f17
c.ult.s $fcc7,$f24,$f10
c.un.d $fcc6,$f23,$f24
c.un.s $fcc1,$f30,$f4
ddiv $zero,$k0,$s3
ddivu $zero,$s0,$s1
div $zero,$t9,$t3
divu $zero,$t9,$t7
ehb
madd.d $f18,$f19,$f26,$f20
madd.s $f1,$f31,$f19,$f25
msub.d $f10,$f1,$f31,$f18
msub.s $f12,$f19,$f10,$f16
nmadd.d $f18,$f9,$f14,$f19
nmadd.s $f0,$f5,$f25,$f12
nmsub.d $f30,$f8,$f16,$f30
nmsub.s $f1,$f24,$f19,$f4
recip.d $f19,$f6
recip.s $f3,$f30
rsqrt.d $f3,$f28
rsqrt.s $f4,$f8
ssnop
tlbp
tlbr
tlbwi
tlbwr

155
test/MC/Mips/mips4/valid.s Normal file
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# Instructions that are valid
#
# FIXME: Test MIPS-IV instead of MIPS64
# RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64 | FileCheck %s
.set noat
abs.d $f7,$f25 # CHECK: encoding
abs.s $f9,$f16
add $s7,$s2,$a1
add.d $f1,$f7,$f29
add.s $f8,$f21,$f24
addi $t5,$t1,26322
addu $t1,$a0,$a2
and $s7,$v0,$t4
c.ngl.d $f29,$f29
c.ngle.d $f0,$f16
c.sf.d $f30,$f0
c.sf.s $f14,$f22
ceil.l.d $f1,$f3
ceil.l.s $f18,$f13
ceil.w.d $f11,$f25
ceil.w.s $f6,$f20
cfc1 $s1,$21
ctc1 $a2,$26
cvt.d.l $f4,$f16
cvt.d.s $f22,$f28
cvt.d.w $f26,$f11
cvt.l.d $f24,$f15
cvt.l.s $f11,$f29
cvt.s.d $f26,$f8
cvt.s.l $f15,$f30
cvt.s.w $f22,$f15
cvt.w.d $f20,$f14
cvt.w.s $f20,$f24
dadd $s3,$at,$ra
daddi $sp,$s4,-27705
daddiu $k0,$s6,-4586
div.d $f29,$f20,$f27
div.s $f4,$f5,$f15
dmfc1 $t4,$f13
dmtc1 $s0,$f14
dmult $s7,$t1
dmultu $a1,$a2
dsllv $zero,$s4,$t4
dsrav $gp,$s2,$s3
dsrlv $s3,$t6,$s4
dsub $a3,$s6,$t0
dsubu $a1,$a1,$k0
eret
floor.l.d $f26,$f7
floor.l.s $f12,$f5
floor.w.d $f14,$f11
floor.w.s $f8,$f9
lb $t8,-14515($t2)
lbu $t0,30195($v1)
ld $sp,-28645($s1)
ldc1 $f11,16391($s0)
ldc2 $8,-21181($at)
ldl $t8,-4167($t8)
ldr $t6,-30358($s4)
ldxc1 $f8,$s7($t7)
lh $t3,-8556($s5)
lhu $s3,-22851($v0)
li $at,-29773
li $zero,-29889
ll $v0,-7321($s2)
lld $zero,-14736($ra)
lw $t0,5674($a1)
lwc1 $f16,10225($k0)
lwc2 $18,-841($a2)
lwl $s4,-4231($t7)
lwr $zero,-19147($gp)
lwu $s3,-24086($v1)
lwxc1 $f12,$s1($s8)
mfc1 $a3,$f27
mfhi $s3
mfhi $sp
mflo $s1
mov.d $f20,$f14
mov.s $f2,$f27
move $a0,$a3
move $s5,$a0
move $s8,$a0
move $t9,$a2
movf $gp,$t0,$fcc7
movf.d $f6,$f11,$fcc5
movf.s $f23,$f5,$fcc6
movn $v1,$s1,$s0
movn.d $f27,$f21,$k0
movn.s $f12,$f0,$s7
movt $zero,$s4,$fcc5
movt.d $f0,$f2,$fcc0
movt.s $f30,$f2,$fcc1
movz $a1,$s6,$t1
movz.d $f12,$f29,$t1
movz.s $f25,$f7,$v1
mtc1 $s8,$f9
mthi $s1
mtlo $sp
mtlo $t9
mul.d $f20,$f20,$f16
mul.s $f30,$f10,$f2
mult $sp,$s4
mult $sp,$v0
multu $gp,$k0
multu $t1,$s2
neg.d $f27,$f18
neg.s $f1,$f15
nop
nor $a3,$zero,$a3
or $t4,$s0,$sp
round.l.d $f12,$f1
round.l.s $f25,$f5
round.w.d $f6,$f4
round.w.s $f27,$f28
sb $s6,-19857($t6)
sc $t7,18904($s3)
scd $t7,-8243($sp)
sd $t4,5835($t2)
sdc1 $f31,30574($t5)
sdc2 $20,23157($s2)
sdl $a3,-20961($s8)
sdr $t3,-20423($t4)
sdxc1 $f11,$t2($t6)
sh $t6,-6704($t7)
sllv $a3,$zero,$t1
slt $s7,$t3,$k1
slti $s1,$t2,9489
sltiu $t9,$t9,-15531
sltu $s4,$s5,$t3
sqrt.d $f17,$f22
sqrt.s $f0,$f1
srav $s1,$s7,$sp
srlv $t9,$s4,$a0
sub $s6,$s3,$t4
sub.d $f18,$f3,$f17
sub.s $f23,$f22,$f22
subu $sp,$s6,$s6
sw $ra,-10160($sp)
swc1 $f6,-8465($t8)
swc2 $25,24880($s0)
swl $t7,13694($s3)
swr $s1,-26590($t6)
swxc1 $f19,$t4($k0)
teqi $s5,-17504
tgei $s1,5025
tgeiu $sp,-28621
tlti $t6,-21059
tltiu $ra,-5076
tnei $t4,-29647
trunc.l.d $f23,$f23
trunc.l.s $f28,$f31
trunc.w.d $f22,$f15
trunc.w.s $f28,$f30
xor $s2,$a0,$s8

98
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# Instructions that should be valid but currently fail for known reasons (e.g.
# they aren't implemented yet).
# This test is set up to XPASS if any instruction generates an encoding.
#
# FIXME: Test MIPS-V instead of MIPS64
# RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64 | not FileCheck %s
# CHECK-NOT: encoding
# XFAIL: *
.set noat
abs.ps $f22,$f8
add.ps $f25,$f27,$f13
alnv.ps $f12,$f18,$f30,$t4
c.eq.d $fcc1,$f15,$f15
c.eq.ps $fcc5,$f0,$f9
c.eq.s $fcc5,$f24,$f17
c.f.d $fcc4,$f11,$f21
c.f.ps $fcc6,$f11,$f11
c.f.s $fcc4,$f30,$f7
c.le.d $fcc4,$f18,$f1
c.le.ps $fcc1,$f7,$f20
c.le.s $fcc6,$f24,$f4
c.lt.d $fcc3,$f9,$f3
c.lt.ps $f19,$f5
c.lt.s $fcc2,$f17,$f14
c.nge.d $fcc5,$f21,$f16
c.nge.ps $f1,$f26
c.nge.s $fcc3,$f11,$f8
c.ngl.ps $f21,$f30
c.ngl.s $fcc2,$f31,$f23
c.ngle.ps $fcc7,$f12,$f20
c.ngle.s $fcc2,$f18,$f23
c.ngt.d $fcc4,$f24,$f7
c.ngt.ps $fcc5,$f30,$f6
c.ngt.s $fcc5,$f8,$f13
c.ole.d $fcc2,$f16,$f31
c.ole.ps $fcc7,$f21,$f8
c.ole.s $fcc3,$f7,$f20
c.olt.d $fcc4,$f19,$f28
c.olt.ps $fcc3,$f7,$f16
c.olt.s $fcc6,$f20,$f7
c.seq.d $fcc4,$f31,$f7
c.seq.ps $fcc6,$f31,$f14
c.seq.s $fcc7,$f1,$f25
c.sf.ps $fcc6,$f4,$f6
c.ueq.d $fcc4,$f13,$f25
c.ueq.ps $fcc1,$f5,$f29
c.ueq.s $fcc6,$f3,$f30
c.ule.d $fcc7,$f25,$f18
c.ule.ps $fcc6,$f17,$f3
c.ule.s $fcc7,$f21,$f30
c.ult.d $fcc6,$f6,$f17
c.ult.ps $fcc7,$f14,$f0
c.ult.s $fcc7,$f24,$f10
c.un.d $fcc6,$f23,$f24
c.un.ps $fcc4,$f2,$f26
c.un.s $fcc1,$f30,$f4
cvt.ps.s $f3,$f18,$f19
cvt.s.pl $f30,$f1
cvt.s.pu $f14,$f25
ddiv $zero,$k0,$s3
ddivu $zero,$s0,$s1
div $zero,$t9,$t3
divu $zero,$t9,$t7
ehb
madd.d $f18,$f19,$f26,$f20
madd.ps $f22,$f3,$f14,$f3
madd.s $f1,$f31,$f19,$f25
mov.ps $f22,$f17
movf.ps $f10,$f28,$fcc6
movn.ps $f31,$f31,$s3
movt.ps $f20,$f25,$fcc2
movz.ps $f18,$f17,$ra
msub.d $f10,$f1,$f31,$f18
msub.ps $f12,$f14,$f29,$f17
msub.s $f12,$f19,$f10,$f16
mul.ps $f14,$f0,$f16
neg.ps $f19,$f13
nmadd.d $f18,$f9,$f14,$f19
nmadd.ps $f27,$f4,$f9,$f25
nmadd.s $f0,$f5,$f25,$f12
nmsub.d $f30,$f8,$f16,$f30
nmsub.ps $f6,$f12,$f14,$f17
nmsub.s $f1,$f24,$f19,$f4
pll.ps $f25,$f9,$f30
plu.ps $f1,$f26,$f29
pul.ps $f9,$f30,$f26
puu.ps $f24,$f9,$f2
recip.d $f19,$f6
recip.s $f3,$f30
rsqrt.d $f3,$f28
rsqrt.s $f4,$f8
ssnop
sub.ps $f5,$f14,$f26
tlbp
tlbr
tlbwi
tlbwr

157
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# Instructions that are valid
#
# FIXME: Test MIPS-V instead of MIPS64
# RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64 | FileCheck %s
.set noat
abs.d $f7,$f25 # CHECK: encoding
abs.s $f9,$f16
add $s7,$s2,$a1
add.d $f1,$f7,$f29
add.s $f8,$f21,$f24
addi $t5,$t1,26322
addu $t1,$a0,$a2
and $s7,$v0,$t4
c.ngl.d $f29,$f29
c.ngle.d $f0,$f16
c.sf.d $f30,$f0
c.sf.s $f14,$f22
ceil.l.d $f1,$f3
ceil.l.s $f18,$f13
ceil.w.d $f11,$f25
ceil.w.s $f6,$f20
cfc1 $s1,$21
ctc1 $a2,$26
cvt.d.l $f4,$f16
cvt.d.s $f22,$f28
cvt.d.w $f26,$f11
cvt.l.d $f24,$f15
cvt.l.s $f11,$f29
cvt.s.d $f26,$f8
cvt.s.l $f15,$f30
cvt.s.w $f22,$f15
cvt.w.d $f20,$f14
cvt.w.s $f20,$f24
dadd $s3,$at,$ra
daddi $sp,$s4,-27705
daddiu $k0,$s6,-4586
div.d $f29,$f20,$f27
div.s $f4,$f5,$f15
dmfc1 $t4,$f13
dmtc1 $s0,$f14
dmult $s7,$t1
dmultu $a1,$a2
dsllv $zero,$s4,$t4
dsrav $gp,$s2,$s3
dsrlv $s3,$t6,$s4
dsub $a3,$s6,$t0
dsubu $a1,$a1,$k0
eret
floor.l.d $f26,$f7
floor.l.s $f12,$f5
floor.w.d $f14,$f11
floor.w.s $f8,$f9
lb $t8,-14515($t2)
lbu $t0,30195($v1)
ld $sp,-28645($s1)
ldc1 $f11,16391($s0)
ldc2 $8,-21181($at)
ldl $t8,-4167($t8)
ldr $t6,-30358($s4)
ldxc1 $f8,$s7($t7)
lh $t3,-8556($s5)
lhu $s3,-22851($v0)
li $at,-29773
li $zero,-29889
ll $v0,-7321($s2)
lld $zero,-14736($ra)
luxc1 $f19,$s6($s5)
lw $t0,5674($a1)
lwc1 $f16,10225($k0)
lwc2 $18,-841($a2)
lwl $s4,-4231($t7)
lwr $zero,-19147($gp)
lwu $s3,-24086($v1)
lwxc1 $f12,$s1($s8)
mfc1 $a3,$f27
mfhi $s3
mfhi $sp
mflo $s1
mov.d $f20,$f14
mov.s $f2,$f27
move $a0,$a3
move $s5,$a0
move $s8,$a0
move $t9,$a2
movf $gp,$t0,$fcc7
movf.d $f6,$f11,$fcc5
movf.s $f23,$f5,$fcc6
movn $v1,$s1,$s0
movn.d $f27,$f21,$k0
movn.s $f12,$f0,$s7
movt $zero,$s4,$fcc5
movt.d $f0,$f2,$fcc0
movt.s $f30,$f2,$fcc1
movz $a1,$s6,$t1
movz.d $f12,$f29,$t1
movz.s $f25,$f7,$v1
mtc1 $s8,$f9
mthi $s1
mtlo $sp
mtlo $t9
mul.d $f20,$f20,$f16
mul.s $f30,$f10,$f2
mult $sp,$s4
mult $sp,$v0
multu $gp,$k0
multu $t1,$s2
neg.d $f27,$f18
neg.s $f1,$f15
nop
nor $a3,$zero,$a3
or $t4,$s0,$sp
round.l.d $f12,$f1
round.l.s $f25,$f5
round.w.d $f6,$f4
round.w.s $f27,$f28
sb $s6,-19857($t6)
sc $t7,18904($s3)
scd $t7,-8243($sp)
sd $t4,5835($t2)
sdc1 $f31,30574($t5)
sdc2 $20,23157($s2)
sdl $a3,-20961($s8)
sdr $t3,-20423($t4)
sdxc1 $f11,$t2($t6)
sh $t6,-6704($t7)
sllv $a3,$zero,$t1
slt $s7,$t3,$k1
slti $s1,$t2,9489
sltiu $t9,$t9,-15531
sltu $s4,$s5,$t3
sqrt.d $f17,$f22
sqrt.s $f0,$f1
srav $s1,$s7,$sp
srlv $t9,$s4,$a0
sub $s6,$s3,$t4
sub.d $f18,$f3,$f17
sub.s $f23,$f22,$f22
subu $sp,$s6,$s6
suxc1 $f12,$k1($t5)
sw $ra,-10160($sp)
swc1 $f6,-8465($t8)
swc2 $25,24880($s0)
swl $t7,13694($s3)
swr $s1,-26590($t6)
swxc1 $f19,$t4($k0)
teqi $s5,-17504
tgei $s1,5025
tgeiu $sp,-28621
tlti $t6,-21059
tltiu $ra,-5076
tnei $t4,-29647
trunc.l.d $f23,$f23
trunc.l.s $f28,$f31
trunc.w.d $f22,$f15
trunc.w.s $f28,$f30
xor $s2,$a0,$s8

104
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# Instructions that should be valid but currently fail for known reasons (e.g.
# they aren't implemented yet).
# This test is set up to XPASS if any instruction generates an encoding.
#
# RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64 | not FileCheck %s
# CHECK-NOT: encoding
# XFAIL: *
.set noat
abs.ps $f22,$f8
add.ps $f25,$f27,$f13
alnv.ob $v22,$v19,$v30,$v1
alnv.ob $v31,$v23,$v30,$at
alnv.ob $v8,$v17,$v30,$a1
alnv.ps $f12,$f18,$f30,$t4
c.eq.d $fcc1,$f15,$f15
c.eq.ps $fcc5,$f0,$f9
c.eq.s $fcc5,$f24,$f17
c.f.d $fcc4,$f11,$f21
c.f.ps $fcc6,$f11,$f11
c.f.s $fcc4,$f30,$f7
c.le.d $fcc4,$f18,$f1
c.le.ps $fcc1,$f7,$f20
c.le.s $fcc6,$f24,$f4
c.lt.d $fcc3,$f9,$f3
c.lt.ps $f19,$f5
c.lt.s $fcc2,$f17,$f14
c.nge.d $fcc5,$f21,$f16
c.nge.ps $f1,$f26
c.nge.s $fcc3,$f11,$f8
c.ngl.ps $f21,$f30
c.ngl.s $fcc2,$f31,$f23
c.ngle.ps $fcc7,$f12,$f20
c.ngle.s $fcc2,$f18,$f23
c.ngt.d $fcc4,$f24,$f7
c.ngt.ps $fcc5,$f30,$f6
c.ngt.s $fcc5,$f8,$f13
c.ole.d $fcc2,$f16,$f31
c.ole.ps $fcc7,$f21,$f8
c.ole.s $fcc3,$f7,$f20
c.olt.d $fcc4,$f19,$f28
c.olt.ps $fcc3,$f7,$f16
c.olt.s $fcc6,$f20,$f7
c.seq.d $fcc4,$f31,$f7
c.seq.ps $fcc6,$f31,$f14
c.seq.s $fcc7,$f1,$f25
c.sf.ps $fcc6,$f4,$f6
c.ueq.d $fcc4,$f13,$f25
c.ueq.ps $fcc1,$f5,$f29
c.ueq.s $fcc6,$f3,$f30
c.ule.d $fcc7,$f25,$f18
c.ule.ps $fcc6,$f17,$f3
c.ule.s $fcc7,$f21,$f30
c.ult.d $fcc6,$f6,$f17
c.ult.ps $fcc7,$f14,$f0
c.ult.s $fcc7,$f24,$f10
c.un.d $fcc6,$f23,$f24
c.un.ps $fcc4,$f2,$f26
c.un.s $fcc1,$f30,$f4
cvt.ps.s $f3,$f18,$f19
cvt.s.pl $f30,$f1
cvt.s.pu $f14,$f25
ddiv $zero,$k0,$s3
ddivu $zero,$s0,$s1
div $zero,$t9,$t3
divu $zero,$t9,$t7
dmfc0 $t2,c0_watchhi,2
dmtc0 $t7,c0_datalo
ehb
madd.d $f18,$f19,$f26,$f20
madd.ps $f22,$f3,$f14,$f3
madd.s $f1,$f31,$f19,$f25
mov.ps $f22,$f17
movf.ps $f10,$f28,$fcc6
movn.ps $f31,$f31,$s3
movt.ps $f20,$f25,$fcc2
movz.ps $f18,$f17,$ra
msgn.qh $v0,$v24,$v20
msgn.qh $v12,$v21,$v0[1]
msub.d $f10,$f1,$f31,$f18
msub.ps $f12,$f14,$f29,$f17
msub.s $f12,$f19,$f10,$f16
mul.ps $f14,$f0,$f16
neg.ps $f19,$f13
nmadd.d $f18,$f9,$f14,$f19
nmadd.ps $f27,$f4,$f9,$f25
nmadd.s $f0,$f5,$f25,$f12
nmsub.d $f30,$f8,$f16,$f30
nmsub.ps $f6,$f12,$f14,$f17
nmsub.s $f1,$f24,$f19,$f4
pll.ps $f25,$f9,$f30
plu.ps $f1,$f26,$f29
pul.ps $f9,$f30,$f26
puu.ps $f24,$f9,$f2
recip.d $f19,$f6
recip.s $f3,$f30
rsqrt.d $f3,$f28
rsqrt.s $f4,$f8
ssnop
sub.ps $f5,$f14,$f26
tlbp
tlbr
tlbwi
tlbwr

170
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# Instructions that are valid
#
# RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64 | FileCheck %s
.set noat
abs.d $f7,$f25 # CHECK: encoding
abs.s $f9,$f16
add $s7,$s2,$a1
add.d $f1,$f7,$f29
add.s $f8,$f21,$f24
addi $t5,$t1,26322
addu $t1,$a0,$a2
and $s7,$v0,$t4
c.ngl.d $f29,$f29
c.ngle.d $f0,$f16
c.sf.d $f30,$f0
c.sf.s $f14,$f22
ceil.l.d $f1,$f3
ceil.l.s $f18,$f13
ceil.w.d $f11,$f25
ceil.w.s $f6,$f20
cfc1 $s1,$21
clo $t3,$a1
clz $sp,$gp
ctc1 $a2,$26
cvt.d.l $f4,$f16
cvt.d.s $f22,$f28
cvt.d.w $f26,$f11
cvt.l.d $f24,$f15
cvt.l.s $f11,$f29
cvt.s.d $f26,$f8
cvt.s.l $f15,$f30
cvt.s.w $f22,$f15
cvt.w.d $f20,$f14
cvt.w.s $f20,$f24
dadd $s3,$at,$ra
daddi $sp,$s4,-27705
daddiu $k0,$s6,-4586
dclo $s2,$a2
dclz $s0,$t9
deret
div.d $f29,$f20,$f27
div.s $f4,$f5,$f15
dmfc1 $t4,$f13
dmtc1 $s0,$f14
dmult $s7,$t1
dmultu $a1,$a2
dsllv $zero,$s4,$t4
dsrav $gp,$s2,$s3
dsrlv $s3,$t6,$s4
dsub $a3,$s6,$t0
dsubu $a1,$a1,$k0
eret
floor.l.d $f26,$f7
floor.l.s $f12,$f5
floor.w.d $f14,$f11
floor.w.s $f8,$f9
lb $t8,-14515($t2)
lbu $t0,30195($v1)
ld $sp,-28645($s1)
ldc1 $f11,16391($s0)
ldc2 $8,-21181($at)
ldl $t8,-4167($t8)
ldr $t6,-30358($s4)
ldxc1 $f8,$s7($t7)
lh $t3,-8556($s5)
lhu $s3,-22851($v0)
li $at,-29773
li $zero,-29889
ll $v0,-7321($s2)
lld $zero,-14736($ra)
luxc1 $f19,$s6($s5)
lw $t0,5674($a1)
lwc1 $f16,10225($k0)
lwc2 $18,-841($a2)
lwl $s4,-4231($t7)
lwr $zero,-19147($gp)
lwu $s3,-24086($v1)
lwxc1 $f12,$s1($s8)
madd $s6,$t5
madd $zero,$t1
maddu $s3,$gp
maddu $t8,$s2
mfc0 $a2,$14,1
mfc1 $a3,$f27
mfhi $s3
mfhi $sp
mflo $s1
mov.d $f20,$f14
mov.s $f2,$f27
move $a0,$a3
move $s5,$a0
move $s8,$a0
move $t9,$a2
movf $gp,$t0,$fcc7
movf.d $f6,$f11,$fcc5
movf.s $f23,$f5,$fcc6
movn $v1,$s1,$s0
movn.d $f27,$f21,$k0
movn.s $f12,$f0,$s7
movt $zero,$s4,$fcc5
movt.d $f0,$f2,$fcc0
movt.s $f30,$f2,$fcc1
movz $a1,$s6,$t1
movz.d $f12,$f29,$t1
movz.s $f25,$f7,$v1
msub $s7,$k1
msubu $t7,$a1
mtc0 $t1,$29,3
mtc1 $s8,$f9
mthi $s1
mtlo $sp
mtlo $t9
mul $s0,$s4,$at
mul.d $f20,$f20,$f16
mul.s $f30,$f10,$f2
mult $sp,$s4
mult $sp,$v0
multu $gp,$k0
multu $t1,$s2
neg.d $f27,$f18
neg.s $f1,$f15
nop
nor $a3,$zero,$a3
or $t4,$s0,$sp
round.l.d $f12,$f1
round.l.s $f25,$f5
round.w.d $f6,$f4
round.w.s $f27,$f28
sb $s6,-19857($t6)
sc $t7,18904($s3)
scd $t7,-8243($sp)
sd $t4,5835($t2)
sdc1 $f31,30574($t5)
sdc2 $20,23157($s2)
sdl $a3,-20961($s8)
sdr $t3,-20423($t4)
sdxc1 $f11,$t2($t6)
sh $t6,-6704($t7)
sllv $a3,$zero,$t1
slt $s7,$t3,$k1
slti $s1,$t2,9489
sltiu $t9,$t9,-15531
sltu $s4,$s5,$t3
sqrt.d $f17,$f22
sqrt.s $f0,$f1
srav $s1,$s7,$sp
srlv $t9,$s4,$a0
sub $s6,$s3,$t4
sub.d $f18,$f3,$f17
sub.s $f23,$f22,$f22
subu $sp,$s6,$s6
suxc1 $f12,$k1($t5)
sw $ra,-10160($sp)
swc1 $f6,-8465($t8)
swc2 $25,24880($s0)
swl $t7,13694($s3)
swr $s1,-26590($t6)
swxc1 $f19,$t4($k0)
teqi $s5,-17504
tgei $s1,5025
tgeiu $sp,-28621
tlti $t6,-21059
tltiu $ra,-5076
tnei $t4,-29647
trunc.l.d $f23,$f23
trunc.l.s $f28,$f31
trunc.w.d $f22,$f15
trunc.w.s $f28,$f30
xor $s2,$a0,$s8

334
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# Instructions that should be valid but currently fail for known reasons (e.g.
# they aren't implemented yet).
# This test is set up to XPASS if any instruction generates an encoding.
#
# RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r2 | not FileCheck %s
# CHECK-NOT: encoding
# XFAIL: *
.set noat
abs.ps $f22,$f8
absq_s.ph $t0,$a0
absq_s.qb $t7,$s1
absq_s.w $s3,$ra
add.ps $f25,$f27,$f13
addq.ph $s1,$t7,$at
addq_s.ph $s3,$s6,$s2
addq_s.w $a2,$t0,$at
addqh.ph $s4,$t6,$s1
addqh.w $s7,$s7,$k1
addqh_r.ph $sp,$t9,$s8
addqh_r.w $t0,$v1,$zero
addsc $s8,$t7,$t4
addu.ph $a2,$t6,$s3
addu.qb $s6,$v1,$v1
addu_s.ph $a3,$s3,$gp
addu_s.qb $s4,$s8,$s1
adduh.qb $a1,$a1,$at
adduh_r.qb $a0,$t1,$t4
addwc $k0,$s6,$s7
alnv.ob $v22,$v19,$v30,$v1
alnv.ob $v31,$v23,$v30,$at
alnv.ob $v8,$v17,$v30,$a1
alnv.ps $f12,$f18,$f30,$t4
and.v $w10,$w25,$w29
bitrev $t6,$at
bmnz.v $w15,$w2,$w28
bmz.v $w13,$w11,$w21
bsel.v $w28,$w7,$w0
c.eq.d $fcc1,$f15,$f15
c.eq.ps $fcc5,$f0,$f9
c.eq.s $fcc5,$f24,$f17
c.f.d $fcc4,$f11,$f21
c.f.ps $fcc6,$f11,$f11
c.f.s $fcc4,$f30,$f7
c.le.d $fcc4,$f18,$f1
c.le.ps $fcc1,$f7,$f20
c.le.s $fcc6,$f24,$f4
c.lt.d $fcc3,$f9,$f3
c.lt.ps $f19,$f5
c.lt.s $fcc2,$f17,$f14
c.nge.d $fcc5,$f21,$f16
c.nge.ps $f1,$f26
c.nge.s $fcc3,$f11,$f8
c.ngl.d $f29,$f29
c.ngl.ps $f21,$f30
c.ngl.s $fcc2,$f31,$f23
c.ngle.ps $fcc7,$f12,$f20
c.ngle.s $fcc2,$f18,$f23
c.ngt.d $fcc4,$f24,$f7
c.ngt.ps $fcc5,$f30,$f6
c.ngt.s $fcc5,$f8,$f13
c.ole.d $fcc2,$f16,$f31
c.ole.ps $fcc7,$f21,$f8
c.ole.s $fcc3,$f7,$f20
c.olt.d $fcc4,$f19,$f28
c.olt.ps $fcc3,$f7,$f16
c.olt.s $fcc6,$f20,$f7
c.seq.d $fcc4,$f31,$f7
c.seq.ps $fcc6,$f31,$f14
c.seq.s $fcc7,$f1,$f25
c.sf.ps $fcc6,$f4,$f6
c.sf.s $f14,$f22
c.ueq.d $fcc4,$f13,$f25
c.ueq.ps $fcc1,$f5,$f29
c.ueq.s $fcc6,$f3,$f30
c.ule.d $fcc7,$f25,$f18
c.ule.ps $fcc6,$f17,$f3
c.ule.s $fcc7,$f21,$f30
c.ult.d $fcc6,$f6,$f17
c.ult.ps $fcc7,$f14,$f0
c.ult.s $fcc7,$f24,$f10
c.un.d $fcc6,$f23,$f24
c.un.ps $fcc4,$f2,$f26
c.un.s $fcc1,$f30,$f4
cvt.ps.s $f3,$f18,$f19
cmp.eq.ph $s7,$t6
cmp.le.ph $t0,$t6
cmp.lt.ph $k0,$sp
cmpgdu.eq.qb $s3,$zero,$k0
cmpgdu.le.qb $v1,$t7,$s2
cmpgdu.lt.qb $s0,$gp,$sp
cmpgu.eq.qb $t6,$s6,$s8
cmpgu.le.qb $t1,$a3,$s4
cmpgu.lt.qb $sp,$at,$t0
cmpu.eq.qb $v0,$t8
cmpu.le.qb $s1,$a1
cmpu.lt.qb $at,$a3
cvt.s.pl $f30,$f1
cvt.s.pu $f14,$f25
ddiv $zero,$k0,$s3
ddivu $zero,$s0,$s1
div $zero,$t9,$t3
divu $zero,$t9,$t7
dmfc0 $t2,c0_watchhi,2
dmfgc0 $gp,c0_perfcnt,6
dmt $k0
dmtc0 $t7,c0_datalo
dmtgc0 $a2,c0_watchlo,2
dpa.w.ph $ac1,$s7,$k0
dpaq_s.w.ph $ac2,$a0,$t5
dpaq_sa.l.w $ac0,$a2,$t6
dpaqx_s.w.ph $ac3,$a0,$t8
dpaqx_sa.w.ph $ac1,$zero,$s5
dpau.h.qbl $ac1,$t2,$t8
dpau.h.qbr $ac1,$s7,$s6
dpax.w.ph $ac3,$a0,$k0
dps.w.ph $ac1,$a3,$a1
dpsq_s.w.ph $ac0,$gp,$k0
dpsq_sa.l.w $ac0,$a3,$t7
dpsqx_s.w.ph $ac3,$t5,$a3
dpsqx_sa.w.ph $ac3,$sp,$s2
dpsu.h.qbl $ac2,$t6,$t2
dpsu.h.qbr $ac2,$a1,$s6
dpsx.w.ph $ac0,$s7,$gp
drorv $at,$a1,$s7
dsbh $v1,$t6
dshd $v0,$sp
dvpe $s6
ehb
emt $t0
evpe $v0
extpdpv $s6,$ac0,$s8
extpv $t5,$ac0,$t6
extrv.w $t0,$ac3,$at
extrv_r.w $t0,$ac1,$s6
extrv_rs.w $gp,$ac1,$s6
extrv_s.h $s2,$ac1,$t6
fclass.d $w14,$w27
fclass.w $w19,$w28
fexupl.d $w10,$w29
fexupl.w $w12,$w27
fexupr.d $w31,$w15
fexupr.w $w29,$w12
ffint_s.d $w1,$w30
ffint_s.w $w16,$w14
ffint_u.d $w23,$w18
ffint_u.w $w19,$w12
ffql.d $w2,$w3
ffql.w $w9,$w0
ffqr.d $w25,$w24
ffqr.w $w10,$w6
fill.b $w9,$v1
fill.d $w28,$t0
fill.h $w9,$t0
fill.w $w31,$t7
flog2.d $w12,$w16
flog2.w $w19,$w23
fork $s2,$t0,$a0
frcp.d $w12,$w4
frcp.w $w30,$w8
frint.d $w20,$w8
frint.w $w11,$w29
frsqrt.d $w29,$w2
frsqrt.w $w9,$w8
fsqrt.d $w3,$w1
fsqrt.w $w5,$w15
ftint_s.d $w31,$w26
ftint_s.w $w27,$w14
ftint_u.d $w5,$w31
ftint_u.w $w12,$w29
ftrunc_s.d $w4,$w22
ftrunc_s.w $w24,$w7
ftrunc_u.d $w20,$w25
ftrunc_u.w $w7,$w26
insv $s2,$at
iret
lbe $t6,122($t1)
lbue $t3,-108($t2)
lbux $t1,$t6($v0)
lhe $s6,219($v1)
lhue $gp,118($t3)
lhx $sp,$k0($t7)
lle $gp,-237($ra)
lwe $ra,-145($t6)
lwle $t3,-42($t3)
lwre $sp,-152($t8)
lwx $t4,$t4($s4)
madd.d $f18,$f19,$f26,$f20
madd.ps $f22,$f3,$f14,$f3
madd.s $f1,$f31,$f19,$f25
maq_s.w.phl $ac2,$t9,$t3
maq_s.w.phr $ac0,$t2,$t9
maq_sa.w.phl $ac3,$a1,$v1
maq_sa.w.phr $ac1,$at,$t2
mfgc0 $s6,c0_datahi1
mflo $t1,$ac2
modsub $a3,$t4,$a3
mov.ps $f22,$f17
movf.ps $f10,$f28,$fcc6
movn.ps $f31,$f31,$s3
movt.ps $f20,$f25,$fcc2
movz.ps $f18,$f17,$ra
msgn.qh $v0,$v24,$v20
msgn.qh $v12,$v21,$v0[1]
msub $ac2,$sp,$t6
msub.d $f10,$f1,$f31,$f18
msub.ps $f12,$f14,$f29,$f17
msub.s $f12,$f19,$f10,$f16
msubu $ac2,$a1,$t8
mtc0 $t1,c0_datahi1
mtgc0 $s4,$21,7
mthi $v0,$ac1
mthlip $a3,$ac0
mul.ph $s4,$t8,$s0
mul.ps $f14,$f0,$f16
mul_s.ph $t2,$t6,$t7
muleq_s.w.phl $t3,$s4,$s4
muleq_s.w.phr $s6,$a0,$s8
muleu_s.ph.qbl $a2,$t6,$t0
muleu_s.ph.qbr $a1,$ra,$t1
mulq_rs.ph $s2,$t6,$t7
mulq_rs.w $at,$s4,$t9
mulq_s.ph $s0,$k1,$t7
mulq_s.w $t1,$a3,$s0
mulsa.w.ph $ac1,$s4,$s6
mulsaq_s.w.ph $ac0,$ra,$s2
neg.ps $f19,$f13
nloc.b $w12,$w30
nloc.d $w16,$w7
nloc.h $w21,$w17
nloc.w $w17,$w16
nlzc.b $w12,$w7
nlzc.d $w14,$w14
nlzc.h $w24,$w24
nlzc.w $w10,$w4
nmadd.d $f18,$f9,$f14,$f19
nmadd.ps $f27,$f4,$f9,$f25
nmadd.s $f0,$f5,$f25,$f12
nmsub.d $f30,$f8,$f16,$f30
nmsub.ps $f6,$f12,$f14,$f17
nmsub.s $f1,$f24,$f19,$f4
nor.v $w20,$w20,$w15
or.v $w13,$w23,$w12
packrl.ph $ra,$t8,$t6
pause
pcnt.b $w30,$w15
pcnt.d $w5,$w16
pcnt.h $w20,$w24
pcnt.w $w22,$w20
pick.ph $ra,$a2,$gp
pick.qb $t3,$a0,$gp
pll.ps $f25,$f9,$f30
plu.ps $f1,$f26,$f29
preceq.w.phl $s8,$gp
preceq.w.phr $s5,$t7
precequ.ph.qbl $s7,$ra
precequ.ph.qbla $a0,$t1
precequ.ph.qbr $ra,$s3
precequ.ph.qbra $t8,$t0
preceu.ph.qbl $sp,$t0
preceu.ph.qbla $s6,$t3
preceu.ph.qbr $gp,$s1
preceu.ph.qbra $k1,$s0
precr.qb.ph $v0,$t4,$s8
precrq.ph.w $t6,$s8,$t8
precrq.qb.ph $a2,$t4,$t4
precrq_rs.ph.w $a1,$k0,$a3
precrqu_s.qb.ph $zero,$gp,$s5
pul.ps $f9,$f30,$f26
puu.ps $f24,$f9,$f2
raddu.w.qb $t9,$s3
rdhwr $sp,$11
rdpgpr $s3,$t1
recip.d $f19,$f6
recip.s $f3,$f30
repl.ph $at,-307
replv.ph $v1,$s7
replv.qb $t9,$t4
rorv $t5,$a3,$s5
rsqrt.d $f3,$f28
rsqrt.s $f4,$f8
sbe $s7,33($s1)
sce $sp,189($t2)
seb $t9,$t7
seh $v1,$t4
she $t8,105($v0)
shilo $ac1,26
shilov $ac2,$t2
shllv.ph $t2,$s0,$s0
shllv.qb $gp,$v1,$zero
shllv_s.ph $k1,$at,$t5
shllv_s.w $s1,$ra,$k0
shrav.ph $t9,$s2,$s1
shrav.qb $zero,$t8,$t3
shrav_r.ph $s3,$t3,$t9
shrav_r.qb $a0,$sp,$s5
shrav_r.w $s7,$s4,$s6
shrlv.ph $t6,$t2,$t1
shrlv.qb $a2,$s2,$t3
ssnop
sub.ps $f5,$f14,$f26
subq.ph $ra,$t1,$s8
subq_s.ph $t5,$s8,$s5
subq_s.w $k1,$a2,$a3
subqh.ph $t2,$at,$t1
subqh.w $v0,$a2,$zero
subqh_r.ph $a0,$t4,$s6
subqh_r.w $t2,$a2,$gp
subu.ph $t1,$s6,$s4
subu.qb $s6,$a2,$s6
subu_s.ph $v1,$a1,$s3
subu_s.qb $s1,$at,$ra
subuh.qb $zero,$gp,$gp
subuh_r.qb $s4,$s8,$s6
swe $t8,94($k0)
swle $v1,-209($gp)
swre $k0,-202($s2)
synci 20023($s0)
tlbginv
tlbginvf
tlbgp
tlbgr
tlbgwi
tlbgwr
tlbinv
tlbinvf
tlbp
tlbr
tlbwi
tlbwr
wrpgpr $zero,$t5
wsbh $k1,$t1
xor.v $w20,$w21,$w30
yield $v1,$s0

171
test/MC/Mips/mips64r2/valid.s Normal file
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@ -0,0 +1,171 @@
# Instructions that are valid
#
# RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r2 | FileCheck %s
.set noat
abs.d $f7,$f25 # CHECK: encoding
abs.s $f9,$f16
add $s7,$s2,$a1
add.d $f1,$f7,$f29
add.s $f8,$f21,$f24
addi $t5,$t1,26322
addu $t1,$a0,$a2
and $s7,$v0,$t4
c.ngle.d $f0,$f16
c.sf.d $f30,$f0
ceil.l.d $f1,$f3
ceil.l.s $f18,$f13
ceil.w.d $f11,$f25
ceil.w.s $f6,$f20
cfc1 $s1,$21
clo $t3,$a1
clz $sp,$gp
ctc1 $a2,$26
cvt.d.l $f4,$f16
cvt.d.s $f22,$f28
cvt.d.w $f26,$f11
cvt.l.d $f24,$f15
cvt.l.s $f11,$f29
cvt.s.d $f26,$f8
cvt.s.l $f15,$f30
cvt.s.w $f22,$f15
cvt.w.d $f20,$f14
cvt.w.s $f20,$f24
dadd $s3,$at,$ra
daddi $sp,$s4,-27705
daddiu $k0,$s6,-4586
dclo $s2,$a2
dclz $s0,$t9
deret
di $s8
div.d $f29,$f20,$f27
div.s $f4,$f5,$f15
dmfc1 $t4,$f13
dmtc1 $s0,$f14
dmult $s7,$t1
dmultu $a1,$a2
dsllv $zero,$s4,$t4
dsrav $gp,$s2,$s3
dsrlv $s3,$t6,$s4
dsub $a3,$s6,$t0
dsubu $a1,$a1,$k0
ei $t6
eret
floor.l.d $f26,$f7
floor.l.s $f12,$f5
floor.w.d $f14,$f11
floor.w.s $f8,$f9
lb $t8,-14515($t2)
lbu $t0,30195($v1)
ld $sp,-28645($s1)
ldc1 $f11,16391($s0)
ldc2 $8,-21181($at)
ldl $t8,-4167($t8)
ldr $t6,-30358($s4)
ldxc1 $f8,$s7($t7)
lh $t3,-8556($s5)
lhu $s3,-22851($v0)
li $at,-29773
li $zero,-29889
ll $v0,-7321($s2)
lld $zero,-14736($ra)
luxc1 $f19,$s6($s5)
lw $t0,5674($a1)
lwc1 $f16,10225($k0)
lwc2 $18,-841($a2)
lwl $s4,-4231($t7)
lwr $zero,-19147($gp)
lwu $s3,-24086($v1)
lwxc1 $f12,$s1($s8)
madd $s6,$t5
madd $zero,$t1
maddu $s3,$gp
maddu $t8,$s2
mfc0 $a2,$14,1
mfc1 $a3,$f27
mfhc1 $s8,$f24
mfhi $s3
mfhi $sp
mflo $s1
mov.d $f20,$f14
mov.s $f2,$f27
move $a0,$a3
move $s5,$a0
move $s8,$a0
move $t9,$a2
movf $gp,$t0,$fcc7
movf.d $f6,$f11,$fcc5
movf.s $f23,$f5,$fcc6
movn $v1,$s1,$s0
movn.d $f27,$f21,$k0
movn.s $f12,$f0,$s7
movt $zero,$s4,$fcc5
movt.d $f0,$f2,$fcc0
movt.s $f30,$f2,$fcc1
movz $a1,$s6,$t1
movz.d $f12,$f29,$t1
movz.s $f25,$f7,$v1
msub $s7,$k1
msubu $t7,$a1
mtc1 $s8,$f9
mthc1 $zero,$f16
mthi $s1
mtlo $sp
mtlo $t9
mul $s0,$s4,$at
mul.d $f20,$f20,$f16
mul.s $f30,$f10,$f2
mult $sp,$s4
mult $sp,$v0
multu $gp,$k0
multu $t1,$s2
neg.d $f27,$f18
neg.s $f1,$f15
nop
nor $a3,$zero,$a3
or $t4,$s0,$sp
round.l.d $f12,$f1
round.l.s $f25,$f5
round.w.d $f6,$f4
round.w.s $f27,$f28
sb $s6,-19857($t6)
sc $t7,18904($s3)
scd $t7,-8243($sp)
sd $t4,5835($t2)
sdc1 $f31,30574($t5)
sdc2 $20,23157($s2)
sdl $a3,-20961($s8)
sdr $t3,-20423($t4)
sdxc1 $f11,$t2($t6)
sh $t6,-6704($t7)
sllv $a3,$zero,$t1
slt $s7,$t3,$k1
slti $s1,$t2,9489
sltiu $t9,$t9,-15531
sltu $s4,$s5,$t3
sqrt.d $f17,$f22
sqrt.s $f0,$f1
srav $s1,$s7,$sp
srlv $t9,$s4,$a0
sub $s6,$s3,$t4
sub.d $f18,$f3,$f17
sub.s $f23,$f22,$f22
subu $sp,$s6,$s6
suxc1 $f12,$k1($t5)
sw $ra,-10160($sp)
swc1 $f6,-8465($t8)
swc2 $25,24880($s0)
swl $t7,13694($s3)
swr $s1,-26590($t6)
swxc1 $f19,$t4($k0)
teqi $s5,-17504
tgei $s1,5025
tgeiu $sp,-28621
tlti $t6,-21059
tltiu $ra,-5076
tnei $t4,-29647
trunc.l.d $f23,$f23
trunc.l.s $f28,$f31
trunc.w.d $f22,$f15
trunc.w.s $f28,$f30
xor $s2,$a0,$s8