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Implement AsmPrinter support for several more operators which have
direct MCExpr equivalents. Don't use MCExpr::Shr because it isn't consistent between targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95620 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -963,8 +963,14 @@ static const MCExpr *LowerConstant(const Constant *CV, AsmPrinter &AP) {
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return MCBinaryExpr::CreateAnd(OpExpr, MaskExpr, Ctx);
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}
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// The MC library also has a right-shift operator, but it isn't consistently
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// signed or unsigned between different targets.
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case Instruction::Add:
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case Instruction::Sub:
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case Instruction::Mul:
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case Instruction::SDiv:
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case Instruction::SRem:
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case Instruction::Shl:
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case Instruction::And:
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case Instruction::Or:
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case Instruction::Xor: {
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@ -974,6 +980,10 @@ static const MCExpr *LowerConstant(const Constant *CV, AsmPrinter &AP) {
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default: llvm_unreachable("Unknown binary operator constant cast expr");
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case Instruction::Add: return MCBinaryExpr::CreateAdd(LHS, RHS, Ctx);
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case Instruction::Sub: return MCBinaryExpr::CreateSub(LHS, RHS, Ctx);
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case Instruction::Mul: return MCBinaryExpr::CreateMul(LHS, RHS, Ctx);
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case Instruction::SDiv: return MCBinaryExpr::CreateDiv(LHS, RHS, Ctx);
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case Instruction::SRem: return MCBinaryExpr::CreateMod(LHS, RHS, Ctx);
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case Instruction::Shl: return MCBinaryExpr::CreateShl(LHS, RHS, Ctx);
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case Instruction::And: return MCBinaryExpr::CreateAnd(LHS, RHS, Ctx);
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case Instruction::Or: return MCBinaryExpr::CreateOr (LHS, RHS, Ctx);
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case Instruction::Xor: return MCBinaryExpr::CreateXor(LHS, RHS, Ctx);
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