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A8.6.105 MUL
Inst{15-12} should be specified as 0b0000. rdar://problem/9231168 ARM disassembler discrepancy: erroneously accepting MUL git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128862 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2687,7 +2687,9 @@ def MULv5: ARMPseudoInst<(outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm,
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def MUL : AsMul1I32<0b0000000, (outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm),
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IIC_iMUL32, "mul", "\t$Rd, $Rn, $Rm",
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[(set GPR:$Rd, (mul GPR:$Rn, GPR:$Rm))]>,
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Requires<[IsARM, HasV6]>;
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Requires<[IsARM, HasV6]> {
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let Inst{15-12} = 0b0000;
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}
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}
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let Constraints = "@earlyclobber $Rd" in
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