Fix fallout from 12-bit stuff landing: decide whether 20 bit displacements are needed during elimination of frame indexes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75989 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Anton Korobeynikov 2009-07-16 14:09:56 +00:00
parent 720e3b00b8
commit 5a11e02fbd
4 changed files with 56 additions and 5 deletions

View File

@ -323,3 +323,47 @@ SystemZInstrInfo::getBrCond(SystemZCC::CondCodes CC) const {
return get(Opc);
}
const TargetInstrDesc&
SystemZInstrInfo::getLongDispOpc(unsigned Opc) const {
switch (Opc) {
case SystemZ::MOV32mr:
Opc = SystemZ::MOV32mry;
break;
case SystemZ::MOV32rm:
Opc = SystemZ::MOV32rmy;
break;
case SystemZ::MOVSX32rm16:
Opc = SystemZ::MOVSX32rm16y;
break;
case SystemZ::MOV32m8r:
Opc = SystemZ::MOV32m8ry;
break;
case SystemZ::MOV32m16r:
Opc = SystemZ::MOV32m16ry;
break;
case SystemZ::MOV64m8r:
Opc = SystemZ::MOV64m8ry;
break;
case SystemZ::MOV64m16r:
Opc = SystemZ::MOV64m16ry;
break;
case SystemZ::MOV64m32r:
Opc = SystemZ::MOV64m32ry;
break;
case SystemZ::MUL32rm:
Opc = SystemZ::MUL32rmy;
break;
case SystemZ::CMP32rm:
Opc = SystemZ::CMP32rmy;
break;
case SystemZ::UCMP32rm:
Opc = SystemZ::UCMP32rmy;
break;
default:
break;
}
return get(Opc);
}

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@ -67,6 +67,7 @@ public:
const SmallVectorImpl<MachineOperand> &Cond) const;
const TargetInstrDesc& getBrCond(SystemZCC::CondCodes CC) const;
const TargetInstrDesc& getLongDispOpc(unsigned Opc) const;
};
}

View File

@ -12,6 +12,7 @@
//===----------------------------------------------------------------------===//
#include "SystemZ.h"
#include "SystemZInstrInfo.h"
#include "SystemZMachineFunctionInfo.h"
#include "SystemZRegisterInfo.h"
#include "SystemZSubtarget.h"
@ -27,7 +28,7 @@
using namespace llvm;
SystemZRegisterInfo::SystemZRegisterInfo(SystemZTargetMachine &tm,
const TargetInstrInfo &tii)
const SystemZInstrInfo &tii)
: SystemZGenRegisterInfo(SystemZ::ADJCALLSTACKUP, SystemZ::ADJCALLSTACKDOWN),
TM(tm), TII(tii) {
}
@ -124,9 +125,14 @@ void SystemZRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
// displacement field.
MI.getOperand(i).ChangeToRegister(BasePtr, false);
// Offset is a 20-bit integer.
// Offset is a either 12-bit unsigned or 20-bit signed integer.
// FIXME: handle "too long" displacements.
int Offset = getFrameIndexOffset(MF, FrameIndex) + MI.getOperand(i+1).getImm();
// Check whether displacement is too long to fit into 12 bit zext field.
if (Offset < 0 || Offset >= 4096)
MI.setDesc(TII.getLongDispOpc(MI.getOpcode()));
MI.getOperand(i+1).ChangeToImmediate(Offset);
}

View File

@ -29,14 +29,14 @@ namespace SystemZ {
}
class SystemZSubtarget;
class TargetInstrInfo;
class SystemZInstrInfo;
class Type;
struct SystemZRegisterInfo : public SystemZGenRegisterInfo {
SystemZTargetMachine &TM;
const TargetInstrInfo &TII;
const SystemZInstrInfo &TII;
SystemZRegisterInfo(SystemZTargetMachine &tm, const TargetInstrInfo &tii);
SystemZRegisterInfo(SystemZTargetMachine &tm, const SystemZInstrInfo &tii);
/// Code Generation virtual methods...
const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const;