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aesthetic changes, no functionality change. Evan, it's not clear

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what 'Available' is, please add a comment near it and rename it
if appropriate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44703 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2007-12-08 07:22:58 +00:00
parent 320c630c1b
commit 5aaddaa7b8
1 changed files with 40 additions and 38 deletions
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12
lib/Target/X86/X86ISelDAGToDAG.cpp
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@ -562,7 +562,7 @@ void X86DAGToDAGISel::EmitFunctionEntryCode(Function &Fn, MachineFunction &MF) {
/// MatchAddress - Add the specified node to the specified addressing mode,
/// returning true if it cannot be done. This just pattern matches for the
/// addressing mode
/// addressing mode.
bool X86DAGToDAGISel::MatchAddress(SDOperand N, X86ISelAddressMode &AM,
bool isRoot, unsigned Depth) {
// Limit recursion.
@ -653,7 +653,9 @@ bool X86DAGToDAGISel::MatchAddress(SDOperand N, X86ISelAddressMode &AM,
break;
case ISD::SHL:
if (!Available && AM.IndexReg.Val == 0 && AM.Scale == 1)
if (Available || AM.IndexReg.Val != 0 || AM.Scale != 1)
break;
if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N.Val->getOperand(1))) {
unsigned Val = CN->getValue();
if (Val == 1 || Val == 2 || Val == 3) {
@ -678,8 +680,8 @@ bool X86DAGToDAGISel::MatchAddress(SDOperand N, X86ISelAddressMode &AM,
}
return false;
}
}
break;
}
case ISD::SMUL_LOHI:
case ISD::UMUL_LOHI:
@ -738,7 +740,8 @@ bool X86DAGToDAGISel::MatchAddress(SDOperand N, X86ISelAddressMode &AM,
case ISD::OR:
// Handle "X | C" as "X + C" iff X is known to have C bits clear.
if (!Available) {
if (Available) break;
if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
X86ISelAddressMode Backup = AM;
// Start with the LHS as an addr mode.
@ -754,7 +757,6 @@ bool X86DAGToDAGISel::MatchAddress(SDOperand N, X86ISelAddressMode &AM,
}
AM = Backup;
}
}
break;
}