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Add implicit use / def operands to created MI's.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31676 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2006-11-11 10:21:44 +00:00
parent 3ba433a7e8
commit 5cd3e9f4b7
3 changed files with 8 additions and 10 deletions
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2
lib/Target/X86/X86FloatingPoint.cpp
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@ -232,7 +232,7 @@ bool FPS::processBasicBlock(MachineFunction &MF, MachineBasicBlock &BB) {
case X86II::ZeroArgFP: handleZeroArgFP(I); break; case X86II::ZeroArgFP: handleZeroArgFP(I); break;
case X86II::OneArgFP: handleOneArgFP(I); break; // fstp ST(0) case X86II::OneArgFP: handleOneArgFP(I); break; // fstp ST(0)
case X86II::OneArgFPRW: handleOneArgFPRW(I); break; // ST(0) = fsqrt(ST(0)) case X86II::OneArgFPRW: handleOneArgFPRW(I); break; // ST(0) = fsqrt(ST(0))
case X86II::TwoArgFP: handleTwoArgFP(I); break; case X86II::TwoArgFP: handleTwoArgFP(I); break;
case X86II::CompareFP: handleCompareFP(I); break; case X86II::CompareFP: handleCompareFP(I); break;
case X86II::CondMovFP: handleCondMovFP(I); break; case X86II::CondMovFP: handleCondMovFP(I); break;
case X86II::SpecialFP: handleSpecialFP(I); break; case X86II::SpecialFP: handleSpecialFP(I); break;

14
lib/Target/X86/X86ISelDAGToDAG.cpp
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@ -525,12 +525,8 @@ void X86DAGToDAGISel::InstructionSelectBasicBlock(SelectionDAG &DAG) {
// Finally, if we found any FP code, emit the FP_REG_KILL instruction. // Finally, if we found any FP code, emit the FP_REG_KILL instruction.
if (ContainsFPCode) { if (ContainsFPCode) {
const TargetInstrDescriptor &II= TM.getInstrInfo()->get(X86::FP_REG_KILL); BuildMI(*BB, BB->getFirstTerminator(), X86::FP_REG_KILL, 0).
MachineInstrBuilder MIB = addImplicitDefsUses();
BuildMI(*BB, BB->getFirstTerminator(), X86::FP_REG_KILL, 0);
for (const unsigned *ImplicitDefs = II.ImplicitDefs;
*ImplicitDefs; ++ImplicitDefs)
MIB = MIB.addReg(*ImplicitDefs, true, true);
++NumFPKill; ++NumFPKill;
} }
} }
@ -541,7 +537,8 @@ void X86DAGToDAGISel::InstructionSelectBasicBlock(SelectionDAG &DAG) {
void X86DAGToDAGISel::EmitSpecialCodeForMain(MachineBasicBlock *BB, void X86DAGToDAGISel::EmitSpecialCodeForMain(MachineBasicBlock *BB,
MachineFrameInfo *MFI) { MachineFrameInfo *MFI) {
if (Subtarget->isTargetCygwin()) if (Subtarget->isTargetCygwin())
BuildMI(BB, X86::CALLpcrel32, 1).addExternalSymbol("__main"); BuildMI(BB, X86::CALLpcrel32, 1).addExternalSymbol("__main").
addImplicitDefsUses();
// Switch the FPU to 64-bit precision mode for better compatibility and speed. // Switch the FPU to 64-bit precision mode for better compatibility and speed.
int CWFrameIdx = MFI->CreateStackObject(2, 2); int CWFrameIdx = MFI->CreateStackObject(2, 2);
@ -952,7 +949,8 @@ SDNode *X86DAGToDAGISel::getGlobalBaseReg() {
// type of register here. // type of register here.
GlobalBaseReg = RegMap->createVirtualRegister(X86::GR32RegisterClass); GlobalBaseReg = RegMap->createVirtualRegister(X86::GR32RegisterClass);
BuildMI(FirstMBB, MBBI, X86::MovePCtoStack, 0); BuildMI(FirstMBB, MBBI, X86::MovePCtoStack, 0);
BuildMI(FirstMBB, MBBI, X86::POP32r, 1, GlobalBaseReg); BuildMI(FirstMBB, MBBI, X86::POP32r, 1, GlobalBaseReg).
addImplicitDefsUses();
} }
return CurDAG->getRegister(GlobalBaseReg, TLI.getPointerTy()).Val; return CurDAG->getRegister(GlobalBaseReg, TLI.getPointerTy()).Val;
} }

2
lib/Target/X86/X86ISelLowering.cpp
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@ -5076,7 +5076,7 @@ X86TargetLowering::InsertAtEndOfBasicBlock(MachineInstr *MI,
MachineBasicBlock *sinkMBB = new MachineBasicBlock(LLVM_BB); MachineBasicBlock *sinkMBB = new MachineBasicBlock(LLVM_BB);
unsigned Opc = unsigned Opc =
X86::GetCondBranchFromCond((X86::CondCode)MI->getOperand(3).getImm()); X86::GetCondBranchFromCond((X86::CondCode)MI->getOperand(3).getImm());
BuildMI(BB, Opc, 1).addMBB(sinkMBB); BuildMI(BB, Opc, 1).addMBB(sinkMBB).addImplicitDefsUses();
MachineFunction *F = BB->getParent(); MachineFunction *F = BB->getParent();
F->getBasicBlockList().insert(It, copy0MBB); F->getBasicBlockList().insert(It, copy0MBB);
F->getBasicBlockList().insert(It, sinkMBB); F->getBasicBlockList().insert(It, sinkMBB);