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The interface to instruction scheduling is now just a call to get the pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1702 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -223,17 +223,6 @@ public:
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}
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};
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class InstructionScheduling : public MethodPass {
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TargetMachine &Target;
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public:
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inline InstructionScheduling(TargetMachine &T) : Target(T) {}
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bool runOnMethod(Method *M) {
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if (ScheduleInstructionsWithSSA(M, Target))
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cerr << "Instr scheduling failed for method " << M->getName() << "\n\n";
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return false;
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}
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};
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struct FreeMachineCodeForMethod : public MethodPass {
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static void freeMachineCode(Instruction *I) {
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MachineCodeForInstruction::destroy(I);
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@ -258,7 +247,7 @@ void UltraSparc::addPassesToEmitAssembly(PassManager &PM, std::ostream &Out) {
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PM.add(new InstructionSelection(*this));
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//PM.add(new InstructionScheduling(*this));
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//PM.add(createInstructionSchedulingWithSSAPass(*this));
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PM.add(getRegisterAllocator(*this));
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