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The interface to instruction scheduling is now just a call to get the pass.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1702 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2002-02-04 20:03:43 +00:00
parent 4d7fc119b8
commit 5ff562e2c0
1 changed files with 1 additions and 12 deletions
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13
lib/Target/SparcV9/SparcV9TargetMachine.cpp
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@ -223,17 +223,6 @@ public:
} }
}; };
class InstructionScheduling : public MethodPass {
TargetMachine &Target;
public:
inline InstructionScheduling(TargetMachine &T) : Target(T) {}
bool runOnMethod(Method *M) {
if (ScheduleInstructionsWithSSA(M, Target))
cerr << "Instr scheduling failed for method " << M->getName() << "\n\n";
return false;
}
};
struct FreeMachineCodeForMethod : public MethodPass { struct FreeMachineCodeForMethod : public MethodPass {
static void freeMachineCode(Instruction *I) { static void freeMachineCode(Instruction *I) {
MachineCodeForInstruction::destroy(I); MachineCodeForInstruction::destroy(I);
@ -258,7 +247,7 @@ void UltraSparc::addPassesToEmitAssembly(PassManager &PM, std::ostream &Out) {
PM.add(new InstructionSelection(*this)); PM.add(new InstructionSelection(*this));
//PM.add(new InstructionScheduling(*this)); //PM.add(createInstructionSchedulingWithSSAPass(*this));
PM.add(getRegisterAllocator(*this)); PM.add(getRegisterAllocator(*this));