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https://github.com/c64scene-ar/llvm-6502.git
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LiveRangeCalc: Rewrite subrange calculation
This changes subrange calculation to calculate subranges sequentially instead of in parallel. The code is easier to understand that way and addresses the code review issues raised about LiveOutData being hard to understand/needing more comments by removing them :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224272 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matthias Braun
@ -29,31 +29,35 @@ void LiveRangeCalc::reset(const MachineFunction *mf,
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DomTree = MDT;
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Alloc = VNIA;
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MainLiveOutData.reset(MF->getNumBlockIDs());
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LiveIn.clear();
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unsigned NumBlocks = MF->getNumBlockIDs();
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Seen.clear();
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Seen.resize(NumBlocks);
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Map.resize(NumBlocks);
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}
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static SlotIndex getDefIndex(const SlotIndexes &Indexes, const MachineInstr &MI,
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bool EarlyClobber) {
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// PHI defs begin at the basic block start index.
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if (MI.isPHI())
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return Indexes.getMBBStartIdx(MI.getParent());
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// Instructions are either normal 'r', or early clobber 'e'.
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return Indexes.getInstructionIndex(&MI).getRegSlot(EarlyClobber);
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static void createDeadDef(SlotIndexes &Indexes, VNInfo::Allocator &Alloc,
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LiveRange &LR, const MachineOperand &MO) {
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const MachineInstr *MI = MO.getParent();
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SlotIndex DefIdx;
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if (MI->isPHI()) {
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DefIdx = Indexes.getMBBStartIdx(MI->getParent());
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} else {
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DefIdx = Indexes.getInstructionIndex(MI).getRegSlot(MO.isEarlyClobber());
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}
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// Create the def in LR. This may find an existing def.
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LR.createDeadDef(DefIdx, Alloc);
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}
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void LiveRangeCalc::createDeadDefs(LiveInterval &LI) {
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void LiveRangeCalc::calculate(LiveInterval &LI) {
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assert(MRI && Indexes && "call reset() first");
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// Step 1: Create minimal live segments for every definition of Reg.
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// Visit all def operands. If the same instruction has multiple defs of Reg,
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// LR.createDeadDef() will deduplicate.
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const TargetRegisterInfo &TRI = *MRI->getTargetRegisterInfo();
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unsigned Reg = LI.reg;
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for (const MachineOperand &MO : MRI->def_operands(Reg)) {
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const MachineInstr *MI = MO.getParent();
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SlotIndex Idx = getDefIndex(*Indexes, *MI, MO.isEarlyClobber());
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for (const MachineOperand &MO : MRI->reg_nodbg_operands(Reg)) {
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unsigned SubReg = MO.getSubReg();
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if (LI.hasSubRanges() || (SubReg != 0 && MRI->tracksSubRegLiveness())) {
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unsigned Mask = SubReg != 0 ? TRI.getSubRegIndexLaneMask(SubReg)
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@ -82,155 +86,108 @@ void LiveRangeCalc::createDeadDefs(LiveInterval &LI) {
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assert(Common == S.LaneMask);
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CommonRange = &S;
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}
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CommonRange->createDeadDef(Idx, *Alloc);
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if (MO.isDef())
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createDeadDef(*Indexes, *Alloc, *CommonRange, MO);
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Mask &= ~Common;
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}
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// Create a new SubRange for subregs we did not cover yet.
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if (Mask != 0) {
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LiveInterval::SubRange *SubRange = LI.createSubRange(*Alloc, Mask);
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SubRange->createDeadDef(Idx, *Alloc);
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LiveInterval::SubRange *NewRange = LI.createSubRange(*Alloc, Mask);
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if (MO.isDef())
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createDeadDef(*Indexes, *Alloc, *NewRange, MO);
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}
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}
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// Create the def in LR. This may find an existing def.
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LI.createDeadDef(Idx, *Alloc);
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// Create the def in the main liverange.
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if (MO.isDef())
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createDeadDef(*Indexes, *Alloc, LI, MO);
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}
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// Step 2: Extend live segments to all uses, constructing SSA form as
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// necessary.
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for (LiveInterval::SubRange &S : LI.subranges()) {
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extendToUses(S, Reg, S.LaneMask);
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}
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extendToUses(LI, Reg, ~0u);
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}
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void LiveRangeCalc::createDeadDefs(LiveRange &LR, unsigned Reg) {
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void LiveRangeCalc::calculate(LiveRange &LR, unsigned Reg, bool IgnoreUses) {
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assert(MRI && Indexes && "call reset() first");
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// Step 1: Create minimal live segments for every definition of Reg.
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// Visit all def operands. If the same instruction has multiple defs of Reg,
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// LR.createDeadDef() will deduplicate.
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for (MachineOperand &MO : MRI->def_operands(Reg)) {
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const MachineInstr *MI = MO.getParent();
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SlotIndex Idx = getDefIndex(*Indexes, *MI, MO.isEarlyClobber());
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// Create the def in LR. This may find an existing def.
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LR.createDeadDef(Idx, *Alloc);
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createDeadDef(*Indexes, *Alloc, LR, MO);
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}
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// Step 2: Extend live segments to all uses, constructing SSA form as
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// necessary.
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if (!IgnoreUses)
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extendToUses(LR, Reg, ~0u);
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}
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static SlotIndex getUseIndex(const SlotIndexes &Indexes,
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const MachineOperand &MO) {
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const MachineInstr *MI = MO.getParent();
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unsigned OpNo = (&MO - &MI->getOperand(0));
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if (MI->isPHI()) {
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assert(!MO.isDef() && "Cannot handle PHI def of partial register.");
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// The actual place where a phi operand is used is the end of the pred MBB.
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// PHI operands are paired: (Reg, PredMBB).
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return Indexes.getMBBEndIdx(MI->getOperand(OpNo+1).getMBB());
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}
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// Check for early-clobber redefs.
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bool isEarlyClobber = false;
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unsigned DefIdx;
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if (MO.isDef()) {
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isEarlyClobber = MO.isEarlyClobber();
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} else if (MI->isRegTiedToDefOperand(OpNo, &DefIdx)) {
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// FIXME: This would be a lot easier if tied early-clobber uses also
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// had an early-clobber flag.
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isEarlyClobber = MI->getOperand(DefIdx).isEarlyClobber();
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}
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return Indexes.getInstructionIndex(MI).getRegSlot(isEarlyClobber);
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}
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void LiveRangeCalc::extendToUses(LiveRange &LR, unsigned Reg) {
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assert(MRI && Indexes && "call reset() first");
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void LiveRangeCalc::extendToUses(LiveRange &LR, unsigned Reg, unsigned Mask) {
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unsigned NumBlocks = MF->getNumBlockIDs();
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Seen.clear();
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Seen.resize(NumBlocks);
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Map.resize(NumBlocks);
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// Visit all operands that read Reg. This may include partial defs.
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const TargetRegisterInfo &TRI = *MRI->getTargetRegisterInfo();
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for (MachineOperand &MO : MRI->reg_nodbg_operands(Reg)) {
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// Clear all kill flags. They will be reinserted after register allocation
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// by LiveIntervalAnalysis::addKillFlags().
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if (MO.isUse())
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MO.setIsKill(false);
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if (!MO.readsReg())
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// We are only interested in uses. For the main range this also includes
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// the reads happening on partial register defs.
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if (!MO.isUse() && (!MO.readsReg() || Mask != ~0u))
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continue;
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unsigned SubReg = MO.getSubReg();
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if (SubReg != 0) {
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unsigned SubRegMask = TRI.getSubRegIndexLaneMask(SubReg);
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// Ignore uses not covering the current subrange.
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if ((SubRegMask & Mask) == 0)
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continue;
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// The create dead-defs logic in calculate() splits subranges as fine as
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// necessary for all uses, so SubRegMask shouldn't be smaller than Mask.
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assert((SubRegMask & ~Mask) == 0);
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}
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// Determine the actual place of the use.
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const MachineInstr *MI = MO.getParent();
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unsigned OpNo = (&MO - &MI->getOperand(0));
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SlotIndex UseIdx;
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if (MI->isPHI()) {
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assert(!MO.isDef() && "Cannot handle PHI def of partial register.");
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// The actual place where a phi operand is used is the end of the pred
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// MBB. PHI operands are paired: (Reg, PredMBB).
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UseIdx = Indexes->getMBBEndIdx(MI->getOperand(OpNo+1).getMBB());
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} else {
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// Check for early-clobber redefs.
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bool isEarlyClobber = false;
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unsigned DefIdx;
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if (MO.isDef()) {
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isEarlyClobber = MO.isEarlyClobber();
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} else if (MI->isRegTiedToDefOperand(OpNo, &DefIdx)) {
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// FIXME: This would be a lot easier if tied early-clobber uses also
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// had an early-clobber flag.
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isEarlyClobber = MI->getOperand(DefIdx).isEarlyClobber();
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}
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UseIdx = Indexes->getInstructionIndex(MI).getRegSlot(isEarlyClobber);
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}
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// MI is reading Reg. We may have visited MI before if it happens to be
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// reading Reg multiple times. That is OK, extend() is idempotent.
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SlotIndex Idx = getUseIndex(*Indexes, MO);
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extend(LR, Idx, Reg, MainLiveOutData);
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extend(LR, UseIdx, Reg);
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}
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}
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void LiveRangeCalc::extendToUses(LiveInterval &LI) {
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assert(MRI && Indexes && "call reset() first");
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const TargetRegisterInfo &TRI = *MRI->getTargetRegisterInfo();
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SmallVector<LiveOutData,2> LiveOuts;
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unsigned NumSubRanges = 0;
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for (const auto &S : LI.subranges()) {
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(void)S;
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++NumSubRanges;
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LiveOuts.push_back(LiveOutData());
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LiveOuts.back().reset(MF->getNumBlockIDs());
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}
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// Visit all operands that read Reg. This may include partial defs.
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unsigned Reg = LI.reg;
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for (MachineOperand &MO : MRI->reg_nodbg_operands(Reg)) {
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// Clear all kill flags. They will be reinserted after register allocation
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// by LiveIntervalAnalysis::addKillFlags().
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if (MO.isUse())
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MO.setIsKill(false);
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if (!MO.readsReg())
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continue;
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SlotIndex Idx = getUseIndex(*Indexes, MO);
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unsigned SubReg = MO.getSubReg();
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if (MO.isUse() && (LI.hasSubRanges() ||
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(MRI->tracksSubRegLiveness() && SubReg != 0))) {
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unsigned Mask = SubReg != 0
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? TRI.getSubRegIndexLaneMask(SubReg)
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: MRI->getMaxLaneMaskForVReg(Reg);
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// If this is the first time we see a subregister def/use. Initialize
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// subranges by creating a copy of the main range.
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if (!LI.hasSubRanges()) {
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unsigned ClassMask = MRI->getMaxLaneMaskForVReg(Reg);
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LI.createSubRangeFrom(*Alloc, ClassMask, LI);
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LiveOuts.insert(LiveOuts.begin(), LiveOutData());
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LiveOuts.front().reset(MF->getNumBlockIDs());
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++NumSubRanges;
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}
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unsigned SubRangeIdx = 0;
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for (LiveInterval::subrange_iterator S = LI.subrange_begin(),
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SE = LI.subrange_end(); S != SE; ++S, ++SubRangeIdx) {
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// A Mask for subregs common to the existing subrange and current def.
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unsigned Common = S->LaneMask & Mask;
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if (Common == 0)
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continue;
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// A Mask for subregs covered by the subrange but not the current def.
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unsigned LRest = S->LaneMask & ~Mask;
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LiveInterval::SubRange *CommonRange;
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unsigned CommonRangeIdx;
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if (LRest != 0) {
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// Split current subrange into Common and LRest ranges.
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S->LaneMask = LRest;
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CommonRange = LI.createSubRangeFrom(*Alloc, Common, *S);
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CommonRangeIdx = 0;
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LiveOuts.insert(LiveOuts.begin(), LiveOutData());
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LiveOuts.front().reset(MF->getNumBlockIDs());
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++NumSubRanges;
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++SubRangeIdx;
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} else {
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// The subrange and current def lanemasks match completely.
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assert(Common == S->LaneMask);
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CommonRange = &*S;
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CommonRangeIdx = SubRangeIdx;
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}
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extend(*CommonRange, Idx, Reg, LiveOuts[CommonRangeIdx]);
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Mask &= ~Common;
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}
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assert(SubRangeIdx == NumSubRanges);
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}
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extend(LI, Idx, Reg, MainLiveOutData);
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}
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}
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void LiveRangeCalc::updateFromLiveIns(LiveOutData &LiveOuts) {
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void LiveRangeCalc::updateFromLiveIns() {
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LiveRangeUpdater Updater;
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for (const LiveInBlock &I : LiveIn) {
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if (!I.DomNode)
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@ -246,8 +203,8 @@ void LiveRangeCalc::updateFromLiveIns(LiveOutData &LiveOuts) {
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else {
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// The value is live-through, update LiveOut as well.
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// Defer the Domtree lookup until it is needed.
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assert(LiveOuts.Seen.test(MBB->getNumber()));
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LiveOuts.Map[MBB] = LiveOutPair(I.Value, nullptr);
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assert(Seen.test(MBB->getNumber()));
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Map[MBB] = LiveOutPair(I.Value, nullptr);
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}
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Updater.setDest(&I.LR);
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Updater.add(Start, End, I.Value);
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@ -256,8 +213,7 @@ void LiveRangeCalc::updateFromLiveIns(LiveOutData &LiveOuts) {
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}
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void LiveRangeCalc::extend(LiveRange &LR, SlotIndex Kill, unsigned PhysReg,
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LiveOutData &LiveOuts) {
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void LiveRangeCalc::extend(LiveRange &LR, SlotIndex Kill, unsigned PhysReg) {
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assert(Kill.isValid() && "Invalid SlotIndex");
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assert(Indexes && "Missing SlotIndexes");
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assert(DomTree && "Missing dominator tree");
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@ -273,28 +229,27 @@ void LiveRangeCalc::extend(LiveRange &LR, SlotIndex Kill, unsigned PhysReg,
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// multiple values, and we may need to create even more phi-defs to preserve
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// VNInfo SSA form. Perform a search for all predecessor blocks where we
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// know the dominating VNInfo.
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if (findReachingDefs(LR, *KillMBB, Kill, PhysReg, LiveOuts))
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if (findReachingDefs(LR, *KillMBB, Kill, PhysReg))
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return;
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// When there were multiple different values, we may need new PHIs.
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calculateValues(LiveOuts);
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calculateValues();
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}
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// This function is called by a client after using the low-level API to add
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// live-out and live-in blocks. The unique value optimization is not
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// available, SplitEditor::transferValues handles that case directly anyway.
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void LiveRangeCalc::calculateValues(LiveOutData &LiveOuts) {
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void LiveRangeCalc::calculateValues() {
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assert(Indexes && "Missing SlotIndexes");
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assert(DomTree && "Missing dominator tree");
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updateSSA(LiveOuts);
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updateFromLiveIns(LiveOuts);
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updateSSA();
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updateFromLiveIns();
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}
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bool LiveRangeCalc::findReachingDefs(LiveRange &LR, MachineBasicBlock &KillMBB,
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SlotIndex Kill, unsigned PhysReg,
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LiveOutData &LiveOuts) {
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SlotIndex Kill, unsigned PhysReg) {
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unsigned KillMBBNum = KillMBB.getNumber();
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// Block numbers where LR should be live-in.
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@ -328,8 +283,8 @@ bool LiveRangeCalc::findReachingDefs(LiveRange &LR, MachineBasicBlock &KillMBB,
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MachineBasicBlock *Pred = *PI;
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// Is this a known live-out block?
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if (LiveOuts.Seen.test(Pred->getNumber())) {
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if (VNInfo *VNI = LiveOuts.Map[Pred].first) {
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if (Seen.test(Pred->getNumber())) {
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if (VNInfo *VNI = Map[Pred].first) {
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if (TheVNI && TheVNI != VNI)
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UniqueVNI = false;
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TheVNI = VNI;
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@ -343,7 +298,7 @@ bool LiveRangeCalc::findReachingDefs(LiveRange &LR, MachineBasicBlock &KillMBB,
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// First time we see Pred. Try to determine the live-out value, but set
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// it as null if Pred is live-through with an unknown value.
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VNInfo *VNI = LR.extendInBlock(Start, End);
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LiveOuts.setLiveOutValue(Pred, VNI);
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setLiveOutValue(Pred, VNI);
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if (VNI) {
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if (TheVNI && TheVNI != VNI)
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UniqueVNI = false;
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@ -378,8 +333,7 @@ bool LiveRangeCalc::findReachingDefs(LiveRange &LR, MachineBasicBlock &KillMBB,
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if (*I == KillMBBNum && Kill.isValid())
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End = Kill;
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else
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LiveOuts.Map[MF->getBlockNumbered(*I)] =
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LiveOutPair(TheVNI, nullptr);
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Map[MF->getBlockNumbered(*I)] = LiveOutPair(TheVNI, nullptr);
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Updater.add(Start, End, TheVNI);
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}
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return true;
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@ -402,7 +356,7 @@ bool LiveRangeCalc::findReachingDefs(LiveRange &LR, MachineBasicBlock &KillMBB,
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// This is essentially the same iterative algorithm that SSAUpdater uses,
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// except we already have a dominator tree, so we don't have to recompute it.
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void LiveRangeCalc::updateSSA(LiveOutData &LiveOuts) {
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void LiveRangeCalc::updateSSA() {
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assert(Indexes && "Missing SlotIndexes");
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assert(DomTree && "Missing dominator tree");
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@ -423,23 +377,22 @@ void LiveRangeCalc::updateSSA(LiveOutData &LiveOuts) {
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// We need a live-in value to a block with no immediate dominator?
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// This is probably an unreachable block that has survived somehow.
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bool needPHI = !IDom
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|| !LiveOuts.Seen.test(IDom->getBlock()->getNumber());
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bool needPHI = !IDom || !Seen.test(IDom->getBlock()->getNumber());
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// IDom dominates all of our predecessors, but it may not be their
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// immediate dominator. Check if any of them have live-out values that are
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// properly dominated by IDom. If so, we need a phi-def here.
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if (!needPHI) {
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IDomValue = LiveOuts.Map[IDom->getBlock()];
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IDomValue = Map[IDom->getBlock()];
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// Cache the DomTree node that defined the value.
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if (IDomValue.first && !IDomValue.second)
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LiveOuts.Map[IDom->getBlock()].second = IDomValue.second =
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Map[IDom->getBlock()].second = IDomValue.second =
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DomTree->getNode(Indexes->getMBBFromIndex(IDomValue.first->def));
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for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
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PE = MBB->pred_end(); PI != PE; ++PI) {
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LiveOutPair &Value = LiveOuts.Map[*PI];
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LiveOutPair &Value = Map[*PI];
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if (!Value.first || Value.first == IDomValue.first)
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continue;
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@ -461,7 +414,7 @@ void LiveRangeCalc::updateSSA(LiveOutData &LiveOuts) {
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// The value may be live-through even if Kill is set, as can happen when
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// we are called from extendRange. In that case LiveOutSeen is true, and
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// LiveOut indicates a foreign or missing value.
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LiveOutPair &LOP = LiveOuts.Map[MBB];
|
||||
LiveOutPair &LOP = Map[MBB];
|
||||
|
||||
// Create a phi-def if required.
|
||||
if (needPHI) {
|
||||
|
||||
Reference in New Issue
Block a user