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[Sparc] Add support to decode negative simm13 operands in the sparc disassembler.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202578 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Venkatraman Govindaraju
2014-03-01 09:11:57 +00:00
parent 830156c660
commit 61f5c0a065
3 changed files with 49 additions and 23 deletions
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9
lib/Target/Sparc/Disassembler/SparcDisassembler.cpp
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@ -192,6 +192,8 @@ static DecodeStatus DecodeStoreQFP(MCInst &Inst, unsigned insn,
uint64_t Address, const void *Decoder);
static DecodeStatus DecodeCall(MCInst &Inst, unsigned insn,
uint64_t Address, const void *Decoder);
static DecodeStatus DecodeSIMM13(MCInst &Inst, unsigned insn,
uint64_t Address, const void *Decoder);
#include "SparcGenDisassemblerTables.inc"
@ -357,3 +359,10 @@ static DecodeStatus DecodeCall(MCInst &MI, unsigned insn,
MI.addOperand(MCOperand::CreateImm(tgt));
return MCDisassembler::Success;
}
static DecodeStatus DecodeSIMM13(MCInst &MI, unsigned insn,
uint64_t Address, const void *Decoder) {
unsigned tgt = SignExtend32<13>(fieldFromInstruction(insn, 0, 13));
MI.addOperand(MCOperand::CreateImm(tgt));
return MCDisassembler::Success;
}