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This opt is now handled in DAG combine.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29243 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2006-07-21 08:26:46 +00:00
parent 917ec983df
commit 625518002d
1 changed files with 0 additions and 2 deletions
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2
lib/Target/X86/X86ISelLowering.cpp
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@ -2393,8 +2393,6 @@ X86TargetLowering::LowerVECTOR_SHUFFLE(SDOperand Op, SelectionDAG &DAG) {
bool V2IsUndef = V2.getOpcode() == ISD::UNDEF;
if (isSplatMask(PermMask.Val)) {
if (ISD::isBuildVectorAllZeros(V1.Val) || ISD::isBuildVectorAllOnes(V1.Val))
return V1;
if (NumElems <= 4) return Op;
// Promote it to a v4i32 splat.
return PromoteSplat(Op, DAG);