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https://github.com/c64scene-ar/llvm-6502.git
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[mips][msa] Direct Object Emission for the majority of the ELM instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192449 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matheus Almeida
parent
6f36ea5c47
commit
62a69eee5a
@ -110,26 +110,93 @@ class MSA_ELM_FMT<bits<10> major, bits<6> minor>: MSAInst {
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}
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class MSA_ELM_B_FMT<bits<4> major, bits<6> minor>: MSAInst {
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bits<4> n;
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bits<5> ws;
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bits<5> wd;
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let Inst{25-22} = major;
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let Inst{21-20} = 0b00;
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let Inst{19-16} = n{3-0};
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let Inst{15-11} = ws;
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let Inst{10-6} = wd;
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let Inst{5-0} = minor;
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}
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class MSA_ELM_H_FMT<bits<4> major, bits<6> minor>: MSAInst {
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bits<4> n;
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bits<5> ws;
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bits<5> wd;
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let Inst{25-22} = major;
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let Inst{21-19} = 0b100;
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let Inst{18-16} = n{2-0};
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let Inst{15-11} = ws;
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let Inst{10-6} = wd;
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let Inst{5-0} = minor;
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}
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class MSA_ELM_W_FMT<bits<4> major, bits<6> minor>: MSAInst {
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bits<4> n;
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bits<5> ws;
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bits<5> wd;
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let Inst{25-22} = major;
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let Inst{21-18} = 0b1100;
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let Inst{17-16} = n{1-0};
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let Inst{15-11} = ws;
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let Inst{10-6} = wd;
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let Inst{5-0} = minor;
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}
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class MSA_ELM_D_FMT<bits<4> major, bits<6> minor>: MSAInst {
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bits<4> n;
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bits<5> ws;
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bits<5> wd;
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let Inst{25-22} = major;
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let Inst{21-17} = 0b11100;
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let Inst{16} = n{0};
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let Inst{15-11} = ws;
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let Inst{10-6} = wd;
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let Inst{5-0} = minor;
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}
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class MSA_ELM_COPY_B_FMT<bits<4> major, bits<6> minor>: MSAInst {
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bits<4> n;
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bits<5> ws;
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bits<5> rd;
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let Inst{25-22} = major;
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let Inst{21-20} = 0b00;
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let Inst{19-16} = n{3-0};
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let Inst{15-11} = ws;
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let Inst{10-6} = rd;
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let Inst{5-0} = minor;
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}
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class MSA_ELM_COPY_H_FMT<bits<4> major, bits<6> minor>: MSAInst {
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bits<4> n;
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bits<5> ws;
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bits<5> rd;
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let Inst{25-22} = major;
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let Inst{21-19} = 0b100;
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let Inst{18-16} = n{2-0};
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let Inst{15-11} = ws;
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let Inst{10-6} = rd;
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let Inst{5-0} = minor;
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}
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class MSA_ELM_COPY_W_FMT<bits<4> major, bits<6> minor>: MSAInst {
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bits<4> n;
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bits<5> ws;
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bits<5> rd;
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let Inst{25-22} = major;
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let Inst{21-18} = 0b1100;
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let Inst{17-16} = n{1-0};
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let Inst{15-11} = ws;
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let Inst{10-6} = rd;
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let Inst{5-0} = minor;
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}
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@ -501,13 +501,13 @@ class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>;
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class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>;
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class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>;
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class COPY_S_B_ENC : MSA_ELM_B_FMT<0b0010, 0b011001>;
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class COPY_S_H_ENC : MSA_ELM_H_FMT<0b0010, 0b011001>;
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class COPY_S_W_ENC : MSA_ELM_W_FMT<0b0010, 0b011001>;
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class COPY_S_B_ENC : MSA_ELM_COPY_B_FMT<0b0010, 0b011001>;
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class COPY_S_H_ENC : MSA_ELM_COPY_H_FMT<0b0010, 0b011001>;
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class COPY_S_W_ENC : MSA_ELM_COPY_W_FMT<0b0010, 0b011001>;
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class COPY_U_B_ENC : MSA_ELM_B_FMT<0b0011, 0b011001>;
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class COPY_U_H_ENC : MSA_ELM_H_FMT<0b0011, 0b011001>;
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class COPY_U_W_ENC : MSA_ELM_W_FMT<0b0011, 0b011001>;
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class COPY_U_B_ENC : MSA_ELM_COPY_B_FMT<0b0011, 0b011001>;
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class COPY_U_H_ENC : MSA_ELM_COPY_H_FMT<0b0011, 0b011001>;
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class COPY_U_W_ENC : MSA_ELM_COPY_W_FMT<0b0011, 0b011001>;
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class CTCMSA_ENC : MSA_ELM_FMT<0b0000111110, 0b011001>;
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@ -1076,12 +1076,23 @@ class MSA_BIT_SPLAT_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
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}
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class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
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ValueType VecTy, RegisterClass RCD, RegisterClass RCWS,
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ValueType VecTy, RegisterOperand ROD,
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RegisterOperand ROWS,
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InstrItinClass itin = NoItinerary> {
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dag OutOperandList = (outs RCD:$rd);
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dag InOperandList = (ins RCWS:$ws, uimm4:$n);
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dag OutOperandList = (outs ROD:$rd);
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dag InOperandList = (ins ROWS:$ws, uimm4:$n);
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string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]");
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list<dag> Pattern = [(set RCD:$rd, (OpNode (VecTy RCWS:$ws), immZExt4:$n))];
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list<dag> Pattern = [(set ROD:$rd, (OpNode (VecTy ROWS:$ws), immZExt4:$n))];
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InstrItinClass Itinerary = itin;
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}
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class MSA_ELM_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
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RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
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InstrItinClass itin = NoItinerary> {
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dag OutOperandList = (outs ROWD:$wd);
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dag InOperandList = (ins ROWS:$ws, uimm4:$n);
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string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$n]");
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list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt4:$n))];
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InstrItinClass Itinerary = itin;
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}
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@ -1285,14 +1296,14 @@ class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
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}
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class MSA_ELM_SPLAT_DESC_BASE<string instr_asm, SplatComplexPattern SplatImm,
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RegisterClass RCWD,
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RegisterClass RCWS = RCWD,
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RegisterOperand ROWD,
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RegisterOperand ROWS = ROWD,
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InstrItinClass itin = NoItinerary> {
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dag OutOperandList = (outs RCWD:$wd);
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dag InOperandList = (ins RCWS:$ws, SplatImm.OpClass:$u3);
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string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$u3]");
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list<dag> Pattern = [(set RCWD:$wd, (MipsVSHF SplatImm:$u3, RCWS:$ws,
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RCWS:$ws))];
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dag OutOperandList = (outs ROWD:$wd);
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dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$n);
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string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$n]");
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list<dag> Pattern = [(set ROWD:$wd, (MipsVSHF SplatImm:$n, ROWS:$ws,
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ROWS:$ws))];
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InstrItinClass Itinerary = itin;
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}
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@ -1600,18 +1611,18 @@ class CLTI_U_D_DESC : MSA_I5_DESC_BASE<"clti_u.d", vsetult_v2i64,
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vsplati64_uimm5, MSA128DOpnd>;
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class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", vextract_sext_i8, v16i8,
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GPR32, MSA128B>;
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GPR32Opnd, MSA128BOpnd>;
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class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", vextract_sext_i16, v8i16,
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GPR32, MSA128H>;
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GPR32Opnd, MSA128HOpnd>;
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class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", vextract_sext_i32, v4i32,
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GPR32, MSA128W>;
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GPR32Opnd, MSA128WOpnd>;
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class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", vextract_zext_i8, v16i8,
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GPR32, MSA128B>;
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GPR32Opnd, MSA128BOpnd>;
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class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", vextract_zext_i16, v8i16,
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GPR32, MSA128H>;
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GPR32Opnd, MSA128HOpnd>;
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class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", vextract_zext_i32, v4i32,
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GPR32, MSA128W>;
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GPR32Opnd, MSA128WOpnd>;
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class COPY_FW_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v4f32, FGR32,
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MSA128W>;
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@ -2206,10 +2217,10 @@ class SLD_H_DESC : MSA_3R_DESC_BASE<"sld.h", int_mips_sld_h, MSA128HOpnd>;
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class SLD_W_DESC : MSA_3R_DESC_BASE<"sld.w", int_mips_sld_w, MSA128WOpnd>;
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class SLD_D_DESC : MSA_3R_DESC_BASE<"sld.d", int_mips_sld_d, MSA128DOpnd>;
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class SLDI_B_DESC : MSA_BIT_B_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128B>;
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class SLDI_H_DESC : MSA_BIT_H_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128H>;
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class SLDI_W_DESC : MSA_BIT_W_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128W>;
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class SLDI_D_DESC : MSA_BIT_D_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128D>;
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class SLDI_B_DESC : MSA_ELM_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128BOpnd>;
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class SLDI_H_DESC : MSA_ELM_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128HOpnd>;
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class SLDI_W_DESC : MSA_ELM_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128WOpnd>;
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class SLDI_D_DESC : MSA_ELM_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128DOpnd>;
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class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128BOpnd>;
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class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128HOpnd>;
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@ -2235,13 +2246,13 @@ class SPLAT_D_DESC : MSA_3R_DESC_BASE<"splat.d", int_mips_splat_d, MSA128DOpnd,
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MSA128DOpnd, GPR32Opnd>;
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class SPLATI_B_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.b", vsplati8_uimm4,
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MSA128B>;
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MSA128BOpnd>;
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class SPLATI_H_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.h", vsplati16_uimm3,
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MSA128H>;
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MSA128HOpnd>;
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class SPLATI_W_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.w", vsplati32_uimm2,
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MSA128W>;
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MSA128WOpnd>;
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class SPLATI_D_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.d", vsplati64_uimm1,
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MSA128D>;
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MSA128DOpnd>;
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class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", sra, MSA128BOpnd>;
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class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", sra, MSA128HOpnd>;
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48
test/MC/Mips/msa/test_elm.s
Normal file
48
test/MC/Mips/msa/test_elm.s
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@ -0,0 +1,48 @@
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# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 -mattr=+msa -arch=mips | FileCheck %s
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#
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# RUN: llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -mattr=+msa -arch=mips -filetype=obj -o - | llvm-objdump -d -triple=mipsel-unknown-linux -mattr=+msa -arch=mips - | FileCheck %s -check-prefix=CHECKOBJDUMP
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#
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# CHECK: copy_s.b $13, $w8[2] # encoding: [0x78,0x82,0x43,0x59]
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# CHECK: copy_s.h $1, $w25[0] # encoding: [0x78,0xa0,0xc8,0x59]
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# CHECK: copy_s.w $22, $w5[1] # encoding: [0x78,0xb1,0x2d,0x99]
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# CHECK: copy_u.b $22, $w20[4] # encoding: [0x78,0xc4,0xa5,0x99]
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# CHECK: copy_u.h $20, $w4[0] # encoding: [0x78,0xe0,0x25,0x19]
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# CHECK: copy_u.w $fp, $w13[2] # encoding: [0x78,0xf2,0x6f,0x99]
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# CHECK: sldi.b $w0, $w29[4] # encoding: [0x78,0x04,0xe8,0x19]
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# CHECK: sldi.h $w8, $w17[0] # encoding: [0x78,0x20,0x8a,0x19]
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# CHECK: sldi.w $w20, $w27[2] # encoding: [0x78,0x32,0xdd,0x19]
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# CHECK: sldi.d $w4, $w12[0] # encoding: [0x78,0x38,0x61,0x19]
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# CHECK: splati.b $w25, $w3[2] # encoding: [0x78,0x42,0x1e,0x59]
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# CHECK: splati.h $w24, $w28[1] # encoding: [0x78,0x61,0xe6,0x19]
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# CHECK: splati.w $w13, $w18[0] # encoding: [0x78,0x70,0x93,0x59]
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# CHECK: splati.d $w28, $w1[0] # encoding: [0x78,0x78,0x0f,0x19]
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# CHECKOBJDUMP: copy_s.b $13, $w8[2]
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# CHECKOBJDUMP: copy_s.h $1, $w25[0]
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# CHECKOBJDUMP: copy_s.w $22, $w5[1]
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# CHECKOBJDUMP: copy_u.b $22, $w20[4]
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# CHECKOBJDUMP: copy_u.h $20, $w4[0]
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# CHECKOBJDUMP: copy_u.w $fp, $w13[2]
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# CHECKOBJDUMP: sldi.b $w0, $w29[4]
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# CHECKOBJDUMP: sldi.h $w8, $w17[0]
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# CHECKOBJDUMP: sldi.w $w20, $w27[2]
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# CHECKOBJDUMP: sldi.d $w4, $w12[0]
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# CHECKOBJDUMP: splati.b $w25, $w3[2]
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# CHECKOBJDUMP: splati.h $w24, $w28[1]
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# CHECKOBJDUMP: splati.w $w13, $w18[0]
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# CHECKOBJDUMP: splati.d $w28, $w1[0]
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copy_s.b $13, $w8[2]
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copy_s.h $1, $w25[0]
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copy_s.w $22, $w5[1]
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copy_u.b $22, $w20[4]
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copy_u.h $20, $w4[0]
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copy_u.w $30, $w13[2]
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sldi.b $w0, $w29[4]
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sldi.h $w8, $w17[0]
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sldi.w $w20, $w27[2]
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sldi.d $w4, $w12[0]
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splati.b $w25, $w3[2]
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splati.h $w24, $w28[1]
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splati.w $w13, $w18[0]
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splati.d $w28, $w1[0]
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