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Don't cache the instruction and register info from the TargetMachine, because

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the internals of TargetMachine could change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183491 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Wendling 2013-06-07 06:26:43 +00:00
parent 54a56fad36
commit 637eab6a3b
4 changed files with 6 additions and 10 deletions
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6
lib/Target/MBlaze/MBlazeDelaySlotFiller.cpp
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@ -37,13 +37,11 @@ static cl::opt<bool> MBDisableDelaySlotFiller(
namespace {
struct Filler : public MachineFunctionPass {
TargetMachine &TM;
const TargetInstrInfo *TII;
static char ID;
Filler(TargetMachine &tm)
: MachineFunctionPass(ID), TM(tm), TII(tm.getInstrInfo()) { }
: MachineFunctionPass(ID), TM(tm) { }
virtual const char *getPassName() const {
return "MBlaze Delay Slot Filler";
@ -239,7 +237,7 @@ bool Filler::runOnMachineBasicBlock(MachineBasicBlock &MBB) {
Changed = true;
if (D == MBB.end())
BuildMI(MBB, ++J, I->getDebugLoc(), TII->get(MBlaze::NOP));
BuildMI(MBB, ++J, I->getDebugLoc(),TM.getInstrInfo()->get(MBlaze::NOP));
else
MBB.splice(++J, &MBB, D);
}

2
lib/Target/MBlaze/MBlazeInstrInfo.cpp
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@ -29,7 +29,7 @@ using namespace llvm;
MBlazeInstrInfo::MBlazeInstrInfo(MBlazeTargetMachine &tm)
: MBlazeGenInstrInfo(MBlaze::ADJCALLSTACKDOWN, MBlaze::ADJCALLSTACKUP),
TM(tm), RI(*TM.getSubtargetImpl(), *this) {}
TM(tm), RI(*TM.getSubtargetImpl()) {}
static bool isZeroImm(const MachineOperand &op) {
return op.isImm() && op.getImm() == 0;

4
lib/Target/MBlaze/MBlazeRegisterInfo.cpp
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@ -42,8 +42,8 @@
using namespace llvm;
MBlazeRegisterInfo::
MBlazeRegisterInfo(const MBlazeSubtarget &ST, const TargetInstrInfo &tii)
: MBlazeGenRegisterInfo(MBlaze::R15), Subtarget(ST), TII(tii) {}
MBlazeRegisterInfo(const MBlazeSubtarget &ST)
: MBlazeGenRegisterInfo(MBlaze::R15), Subtarget(ST) {}
unsigned MBlazeRegisterInfo::getPICCallReg() {
return MBlaze::R20;

4
lib/Target/MBlaze/MBlazeRegisterInfo.h
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@ -37,10 +37,8 @@ namespace MBlaze {
struct MBlazeRegisterInfo : public MBlazeGenRegisterInfo {
const MBlazeSubtarget &Subtarget;
const TargetInstrInfo &TII;
MBlazeRegisterInfo(const MBlazeSubtarget &Subtarget,
const TargetInstrInfo &tii);
MBlazeRegisterInfo(const MBlazeSubtarget &Subtarget);
/// Get PIC indirect call register
static unsigned getPICCallReg();