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Fix two typos I found in comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9806 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -760,7 +760,7 @@ UltraSparcRegInfo::cpReg2MemMI(std::vector<MachineInstr*>& mvec,
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RegClass* RC = PRA.getRegClassByID(this->getRegClassIDOfRegType(RegType));
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OffReg = PRA.getUnusedUniRegAtMI(RC, RegType, MInst, LVSetBef);
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#else
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// Default to using register g2 for holding large offsets
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// Default to using register g4 for holding large offsets
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OffReg = getUnifiedRegNum(UltraSparcRegInfo::IntRegClassID,
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SparcIntRegClass::g4);
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#endif
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@ -845,7 +845,7 @@ UltraSparcRegInfo::cpMem2RegMI(std::vector<MachineInstr*>& mvec,
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RegClass* RC = PRA.getRegClassByID(this->getRegClassIDOfRegType(RegType));
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OffReg = PRA.getUnusedUniRegAtMI(RC, RegType, MInst, LVSetBef);
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#else
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// Default to using register g2 for holding large offsets
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// Default to using register g4 for holding large offsets
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OffReg = getUnifiedRegNum(UltraSparcRegInfo::IntRegClassID,
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SparcIntRegClass::g4);
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#endif
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@ -32,7 +32,7 @@ let Namespace = "SparcV9" in {
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// For fun, specify a register class.
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//
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// FIXME: the register order should be defined in terms of the prefered
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// FIXME: the register order should be defined in terms of the preferred
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// allocation order...
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//
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def IntRegs : RegisterClass<i64, 8, [G0, G1, G2, G3, G4, G5, G6, G7,
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