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R600: Add a few tests I forgot to add.
These belong with r210827 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211253 91177308-0d34-0410-b5e6-96231b3b80d8
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48
test/CodeGen/R600/llvm.AMDGPU.abs.ll
Normal file
48
test/CodeGen/R600/llvm.AMDGPU.abs.ll
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; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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declare i32 @llvm.AMDGPU.abs(i32) nounwind readnone
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; Legacy name
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declare i32 @llvm.AMDIL.abs.i32(i32) nounwind readnone
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; FUNC-LABEL: @s_abs_i32
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; SI: S_SUB_I32
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; SI: S_MAX_I32
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; SI: S_ENDPGM
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; EG: SUB_INT
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; EG: MAX_INT
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define void @s_abs_i32(i32 addrspace(1)* %out, i32 %src) nounwind {
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%abs = call i32 @llvm.AMDGPU.abs(i32 %src) nounwind readnone
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store i32 %abs, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @v_abs_i32
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; SI: V_SUB_I32_e32
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; SI: V_MAX_I32_e32
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; SI: S_ENDPGM
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; EG: SUB_INT
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; EG: MAX_INT
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define void @v_abs_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %src) nounwind {
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%val = load i32 addrspace(1)* %src, align 4
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%abs = call i32 @llvm.AMDGPU.abs(i32 %val) nounwind readnone
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store i32 %abs, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @abs_i32_legacy_amdil
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; SI: V_SUB_I32_e32
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; SI: V_MAX_I32_e32
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; SI: S_ENDPGM
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; EG: SUB_INT
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; EG: MAX_INT
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define void @abs_i32_legacy_amdil(i32 addrspace(1)* %out, i32 addrspace(1)* %src) nounwind {
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%val = load i32 addrspace(1)* %src, align 4
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%abs = call i32 @llvm.AMDIL.abs.i32(i32 %val) nounwind readnone
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store i32 %abs, i32 addrspace(1)* %out, align 4
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ret void
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}
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28
test/CodeGen/R600/llvm.AMDGPU.clamp.ll
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28
test/CodeGen/R600/llvm.AMDGPU.clamp.ll
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; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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declare float @llvm.AMDGPU.clamp.f32(float, float, float) nounwind readnone
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declare float @llvm.AMDIL.clamp.f32(float, float, float) nounwind readnone
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; FUNC-LABEL: @clamp_0_1_f32
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; SI: S_LOAD_DWORD [[ARG:s[0-9]+]],
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; SI: V_ADD_F32_e64 [[RESULT:v[0-9]+]], [[ARG]], 0, 1, 0
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; SI: BUFFER_STORE_DWORD [[RESULT]]
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; SI: S_ENDPGM
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; EG: MOV_SAT
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define void @clamp_0_1_f32(float addrspace(1)* %out, float %src) nounwind {
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%clamp = call float @llvm.AMDGPU.clamp.f32(float %src, float 0.0, float 1.0) nounwind readnone
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store float %clamp, float addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @clamp_0_1_amdil_legacy_f32
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; SI: S_LOAD_DWORD [[ARG:s[0-9]+]],
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; SI: V_ADD_F32_e64 [[RESULT:v[0-9]+]], [[ARG]], 0, 1, 0
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; SI: BUFFER_STORE_DWORD [[RESULT]]
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define void @clamp_0_1_amdil_legacy_f32(float addrspace(1)* %out, float %src) nounwind {
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%clamp = call float @llvm.AMDIL.clamp.f32(float %src, float 0.0, float 1.0) nounwind readnone
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store float %clamp, float addrspace(1)* %out, align 4
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ret void
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}
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27
test/CodeGen/R600/llvm.AMDGPU.fract.ll
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27
test/CodeGen/R600/llvm.AMDGPU.fract.ll
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; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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declare float @llvm.AMDGPU.fract.f32(float) nounwind readnone
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; Legacy name
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declare float @llvm.AMDIL.fraction.f32(float) nounwind readnone
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; FUNC-LABEL: @fract_f32
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; SI: V_FRACT_F32
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; EG: FRACT
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define void @fract_f32(float addrspace(1)* %out, float addrspace(1)* %src) nounwind {
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%val = load float addrspace(1)* %src, align 4
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%fract = call float @llvm.AMDGPU.fract.f32(float %val) nounwind readnone
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store float %fract, float addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @fract_f32_legacy_amdil
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; SI: V_FRACT_F32
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; EG: FRACT
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define void @fract_f32_legacy_amdil(float addrspace(1)* %out, float addrspace(1)* %src) nounwind {
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%val = load float addrspace(1)* %src, align 4
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%fract = call float @llvm.AMDIL.fraction.f32(float %val) nounwind readnone
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store float %fract, float addrspace(1)* %out, align 4
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ret void
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}
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