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Eliminate a hash table probe when killing virtual registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103934 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -146,10 +146,10 @@ namespace {
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void definePhysReg(MachineInstr *MI, unsigned PhysReg, RegState NewState);
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void assignVirtToPhysReg(LiveRegEntry &LRE, unsigned PhysReg);
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void allocVirtReg(MachineInstr *MI, LiveRegEntry &LRE, unsigned Hint);
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unsigned defineVirtReg(MachineInstr *MI, unsigned OpNum,
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unsigned VirtReg, unsigned Hint);
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unsigned reloadVirtReg(MachineInstr *MI, unsigned OpNum,
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unsigned VirtReg, unsigned Hint);
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LiveRegMap::iterator defineVirtReg(MachineInstr *MI, unsigned OpNum,
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unsigned VirtReg, unsigned Hint);
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LiveRegMap::iterator reloadVirtReg(MachineInstr *MI, unsigned OpNum,
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unsigned VirtReg, unsigned Hint);
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void spillAll(MachineInstr *MI);
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bool setPhysReg(MachineOperand &MO, unsigned PhysReg);
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};
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@ -534,8 +534,9 @@ void RAFast::allocVirtReg(MachineInstr *MI, LiveRegEntry &LRE, unsigned Hint) {
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}
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/// defineVirtReg - Allocate a register for VirtReg and mark it as dirty.
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unsigned RAFast::defineVirtReg(MachineInstr *MI, unsigned OpNum,
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unsigned VirtReg, unsigned Hint) {
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RAFast::LiveRegMap::iterator
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RAFast::defineVirtReg(MachineInstr *MI, unsigned OpNum,
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unsigned VirtReg, unsigned Hint) {
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assert(TargetRegisterInfo::isVirtualRegister(VirtReg) &&
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"Not a virtual register");
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LiveRegMap::iterator LRI;
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@ -551,12 +552,13 @@ unsigned RAFast::defineVirtReg(MachineInstr *MI, unsigned OpNum,
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LR.LastOpNum = OpNum;
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LR.Dirty = true;
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UsedInInstr.set(LR.PhysReg);
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return LR.PhysReg;
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return LRI;
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}
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/// reloadVirtReg - Make sure VirtReg is available in a physreg and return it.
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unsigned RAFast::reloadVirtReg(MachineInstr *MI, unsigned OpNum,
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unsigned VirtReg, unsigned Hint) {
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RAFast::LiveRegMap::iterator
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RAFast::reloadVirtReg(MachineInstr *MI, unsigned OpNum,
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unsigned VirtReg, unsigned Hint) {
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assert(TargetRegisterInfo::isVirtualRegister(VirtReg) &&
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"Not a virtual register");
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LiveRegMap::iterator LRI;
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@ -592,7 +594,7 @@ unsigned RAFast::reloadVirtReg(MachineInstr *MI, unsigned OpNum,
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LR.LastUse = MI;
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LR.LastOpNum = OpNum;
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UsedInInstr.set(LR.PhysReg);
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return LR.PhysReg;
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return LRI;
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}
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// setPhysReg - Change MO the refer the PhysReg, considering subregs.
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@ -734,12 +736,14 @@ void RAFast::AllocateBasicBlock() {
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unsigned Reg = MO.getReg();
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if (!Reg || TargetRegisterInfo::isPhysicalRegister(Reg)) continue;
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if (MO.isUse()) {
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unsigned PhysReg = reloadVirtReg(MI, i, Reg, CopyDst);
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LiveRegMap::iterator LRI = reloadVirtReg(MI, i, Reg, CopyDst);
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unsigned PhysReg = LRI->second.PhysReg;
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CopySrc = (CopySrc == Reg || CopySrc == PhysReg) ? PhysReg : 0;
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if (setPhysReg(MO, PhysReg))
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killVirtReg(Reg);
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killVirtReg(LRI);
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} else if (MO.isEarlyClobber()) {
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unsigned PhysReg = defineVirtReg(MI, i, Reg, 0);
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LiveRegMap::iterator LRI = defineVirtReg(MI, i, Reg, 0);
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unsigned PhysReg = LRI->second.PhysReg;
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setPhysReg(MO, PhysReg);
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PhysECs.push_back(PhysReg);
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}
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@ -781,9 +785,10 @@ void RAFast::AllocateBasicBlock() {
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regFree : regReserved);
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continue;
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}
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unsigned PhysReg = defineVirtReg(MI, i, Reg, CopySrc);
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LiveRegMap::iterator LRI = defineVirtReg(MI, i, Reg, CopySrc);
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unsigned PhysReg = LRI->second.PhysReg;
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if (setPhysReg(MO, PhysReg)) {
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killVirtReg(Reg);
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killVirtReg(LRI);
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CopyDst = 0; // cancel coalescing;
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} else
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CopyDst = (CopyDst == Reg || CopyDst == PhysReg) ? PhysReg : 0;
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