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Full varargs support. All of UnitTests now passes

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21070 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Nate Begeman
2005-04-03 23:11:17 +00:00
parent 4ec0cbdf15
commit 6644d4c933
1 changed files with 15 additions and 5 deletions
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20
lib/Target/PowerPC/PPCISelPattern.cpp
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@@ -194,12 +194,22 @@ PPC32TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) {
// the start of the first vararg value... for expansion of llvm.va_start. // the start of the first vararg value... for expansion of llvm.va_start.
if (F.isVarArg()) { if (F.isVarArg()) {
VarArgsFrameIndex = MFI->CreateFixedObject(4, ArgOffset); VarArgsFrameIndex = MFI->CreateFixedObject(4, ArgOffset);
// If this function is vararg, store r4-r10 to their spots on the stack so
// that they may be loaded by dereferencing va_next
SDOperand FIN = DAG.getFrameIndex(VarArgsFrameIndex, MVT::i32); SDOperand FIN = DAG.getFrameIndex(VarArgsFrameIndex, MVT::i32);
SDOperand Val = DAG.getCopyFromReg(PPC::R4, MVT::i32, DAG.getRoot()); // If this function is vararg, store any remaining integer argument regs
SDOperand Store = DAG.getNode(ISD::STORE, MVT::Other, Val.getValue(1), Val, FIN); // to their spots on the stack so that they may be loaded by deferencing the
DAG.setRoot(Store); // result of va_next.
std::vector<SDOperand> MemOps;
for (; GPR_remaining > 0; --GPR_remaining, ++GPR_idx) {
BuildMI(&BB, PPC::IMPLICIT_DEF, 0, GPR[GPR_idx]);
SDOperand Val = DAG.getCopyFromReg(GPR[GPR_idx], MVT::i32, DAG.getRoot());
SDOperand Store = DAG.getNode(ISD::STORE, MVT::Other, Val.getValue(1),
Val, FIN);
MemOps.push_back(Store);
// Increment the address by four for the next argument to store
SDOperand PtrOff = DAG.getConstant(4, getPointerTy());
FIN = DAG.getNode(ISD::ADD, MVT::i32, FIN, PtrOff);
}
DAG.setRoot(DAG.getNode(ISD::TokenFactor, MVT::Other, MemOps));
} }
return ArgValues; return ArgValues;