6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-07-21 18:29:45 +00:00
Code Issues Projects Releases Wiki Activity

[CodeGen] Combine concat_vector of trunc'd scalar to scalar_to_vector.

Browse Source 
We already do:
  concat_vectors(scalar, undef) -> scalar_to_vector(scalar)
When the scalar is legal.
When it's not, but is a truncated legal scalar, we can also do:
  concat_vectors(trunc(scalar), undef) -> scalar_to_vector(scalar)
Which is equivalent, since the upper lanes are undef anyway.
While there, teach the combine to look at more than 2 operands.

Differential Revision: http://reviews.llvm.org/D8883


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234530 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Ahmed Bougacha 2015-04-09 20:04:47 +00:00
parent 117bf240ef
commit 66649e00c9
3 changed files with 33 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
View File

@ -11514,9 +11514,10 @@ SDValue DAGCombiner::visitCONCAT_VECTORS(SDNode *N) {
if (ISD::allOperandsUndef(N))
return DAG.getUNDEF(VT);
// Optimize concat_vectors where one of the vectors is undef.
if (N->getNumOperands() == 2 &&
N->getOperand(1)->getOpcode() == ISD::UNDEF) {
// Optimize concat_vectors where all but the first of the vectors are undef.
if (std::all_of(std::next(N->op_begin()), N->op_end(), [](const SDValue &Op) {
return Op.getOpcode() == ISD::UNDEF;
})) {
SDValue In = N->getOperand(0);
assert(In.getValueType().isVector() && "Must concat vectors");
@ -11524,6 +11525,15 @@ SDValue DAGCombiner::visitCONCAT_VECTORS(SDNode *N) {
if (In->getOpcode() == ISD::BITCAST &&
!In->getOperand(0)->getValueType(0).isVector()) {
SDValue Scalar = In->getOperand(0);
// If the bitcast type isn't legal, it might be a trunc of a legal type;
// look through the trunc so we can still do the transform:
// concat_vectors(trunc(scalar), undef) -> scalar_to_vector(scalar)
if (Scalar->getOpcode() == ISD::TRUNCATE &&
!TLI.isTypeLegal(Scalar.getValueType()) &&
TLI.isTypeLegal(Scalar->getOperand(0).getValueType()))
Scalar = Scalar->getOperand(0);
EVT SclTy = Scalar->getValueType(0);
if (!SclTy.isFloatingPoint() && !SclTy.isInteger())

2
test/CodeGen/AArch64/concat_vector-truncate-combine.ll
View File

@ -2,6 +2,8 @@
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
; Test the (concat_vectors (trunc), (trunc)) pattern.
define <4 x i16> @test_concat_truncate_v2i64_to_v4i16(<2 x i64> %a, <2 x i64> %b) #0 {
entry:
; CHECK-LABEL: test_concat_truncate_v2i64_to_v4i16:

18
test/CodeGen/AArch64/concat_vector-truncated-scalar-combine.ll Normal file
View File

@ -0,0 +1,18 @@
; RUN: llc < %s -mtriple aarch64-unknown-unknown -asm-verbose=false | FileCheck %s
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
; Test the (concat_vectors (bitcast (trunc (scalar))), undef..) pattern.
define <8 x i8> @test_concat_from_truncated_scalar(i32 %x) #0 {
entry:
; CHECK-LABEL: test_concat_from_truncated_scalar:
; CHECK-NEXT: fmov s0, w0
; CHECK-NEXT: ret
%t = trunc i32 %x to i16
%0 = bitcast i16 %t to <2 x i8>
%1 = shufflevector <2 x i8> %0, <2 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2>
ret <8 x i8> %1
}
attributes #0 = { nounwind }