mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-01-12 02:33:33 +00:00
use ins/outs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98866 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
cedef1ccf0
commit
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@ -56,16 +56,16 @@ class MfcForm<bits<6> opcode, bits<16> fc, string asmstr, InstrItinClass itin>
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: InstAlpha<opcode, asmstr, itin> {
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bits<5> Ra;
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let OutOperandList = (ops GPRC:$RA);
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let InOperandList = (ops);
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let OutOperandList = (outs GPRC:$RA);
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let InOperandList = (ins);
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let Inst{25-21} = Ra;
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let Inst{20-16} = 0;
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let Inst{15-0} = fc;
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}
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class MfcPForm<bits<6> opcode, bits<16> fc, string asmstr, InstrItinClass itin>
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: InstAlpha<opcode, asmstr, itin> {
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let OutOperandList = (ops);
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let InOperandList = (ops);
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let OutOperandList = (outs);
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let InOperandList = (ins);
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let Inst{25-21} = 0;
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let Inst{20-16} = 0;
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let Inst{15-0} = fc;
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@ -77,7 +77,7 @@ class MbrForm<bits<6> opcode, bits<2> TB, dag OL, string asmstr, InstrItinClass
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bits<5> Rb;
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bits<14> disp;
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let OutOperandList = (ops);
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let OutOperandList = (outs);
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let InOperandList = OL;
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let Inst{25-21} = Ra;
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@ -92,7 +92,7 @@ class MbrpForm<bits<6> opcode, bits<2> TB, dag OL, string asmstr, list<dag> patt
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bits<5> Rb;
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bits<14> disp;
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let OutOperandList = (ops);
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let OutOperandList = (outs);
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let InOperandList = OL;
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let Inst{25-21} = Ra;
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@ -107,7 +107,7 @@ def target : Operand<OtherVT> {}
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let isBranch = 1, isTerminator = 1, hasCtrlDep = 1 in {
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class BFormN<bits<6> opcode, dag OL, string asmstr, InstrItinClass itin>
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: InstAlpha<opcode, asmstr, itin> {
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let OutOperandList = (ops);
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let OutOperandList = (outs);
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let InOperandList = OL;
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bits<64> Opc; //dummy
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bits<5> Ra;
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@ -122,8 +122,8 @@ let isBranch = 1, isTerminator = 1 in
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class BFormD<bits<6> opcode, string asmstr, list<dag> pattern, InstrItinClass itin>
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: InstAlpha<opcode, asmstr, itin> {
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let Pattern = pattern;
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let OutOperandList = (ops);
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let InOperandList = (ops target:$DISP);
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let OutOperandList = (outs);
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let InOperandList = (ins target:$DISP);
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bits<5> Ra;
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bits<21> disp;
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@ -250,7 +250,7 @@ class FPForm<bits<6> opcode, bits<11> fun, string asmstr, list<dag> pattern, Ins
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//3.3.5
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class PALForm<bits<6> opcode, dag OL, string asmstr, InstrItinClass itin>
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: InstAlpha<opcode, asmstr, itin> {
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let OutOperandList = (ops);
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let OutOperandList = (outs);
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let InOperandList = OL;
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bits<26> Function;
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@ -392,12 +392,12 @@ def : Pat<(setune GPRC:$X, immUExt8:$Y), (CMPEQi (CMPEQ GPRC:$X, immUExt8:$Y), 0
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let isReturn = 1, isTerminator = 1, isBarrier = 1, Ra = 31, Rb = 26, disp = 1, Uses = [R26] in {
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def RETDAG : MbrForm< 0x1A, 0x02, (ops), "ret $$31,($$26),1", s_jsr>; //Return from subroutine
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def RETDAGp : MbrpForm< 0x1A, 0x02, (ops), "ret $$31,($$26),1", [(retflag)], s_jsr>; //Return from subroutine
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def RETDAG : MbrForm< 0x1A, 0x02, (ins), "ret $$31,($$26),1", s_jsr>; //Return from subroutine
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def RETDAGp : MbrpForm< 0x1A, 0x02, (ins), "ret $$31,($$26),1", [(retflag)], s_jsr>; //Return from subroutine
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}
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let isBranch = 1, isTerminator = 1, isBarrier = 1, isIndirectBranch = 1, Ra = 31, disp = 0 in
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def JMP : MbrpForm< 0x1A, 0x00, (ops GPRC:$RS), "jmp $$31,($RS),0",
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def JMP : MbrpForm< 0x1A, 0x00, (ins GPRC:$RS), "jmp $$31,($RS),0",
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[(brind GPRC:$RS)], s_jsr>; //Jump
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let isCall = 1, Ra = 26,
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@ -414,18 +414,18 @@ let isCall = 1, Ra = 26, Rb = 27, disp = 0,
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F0, F1,
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F10, F11, F12, F13, F14, F15, F16, F17, F18, F19,
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F20, F21, F22, F23, F24, F25, F26, F27, F28, F29, F30], Uses = [R27, R29] in {
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def JSR : MbrForm< 0x1A, 0x01, (ops ), "jsr $$26,($$27),0", s_jsr>; //Jump to subroutine
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def JSR : MbrForm< 0x1A, 0x01, (ins), "jsr $$26,($$27),0", s_jsr>; //Jump to subroutine
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}
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let isCall = 1, Ra = 23, Rb = 27, disp = 0,
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Defs = [R23, R24, R25, R27, R28], Uses = [R24, R25, R27] in
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def JSRs : MbrForm< 0x1A, 0x01, (ops ), "jsr $$23,($$27),0", s_jsr>; //Jump to div or rem
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def JSRs : MbrForm< 0x1A, 0x01, (ins), "jsr $$23,($$27),0", s_jsr>; //Jump to div or rem
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def JSR_COROUTINE : MbrForm< 0x1A, 0x03, (ops GPRC:$RD, GPRC:$RS, s14imm:$DISP), "jsr_coroutine $RD,($RS),$DISP", s_jsr>; //Jump to subroutine return
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def JSR_COROUTINE : MbrForm< 0x1A, 0x03, (ins GPRC:$RD, GPRC:$RS, s14imm:$DISP), "jsr_coroutine $RD,($RS),$DISP", s_jsr>; //Jump to subroutine return
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let OutOperandList = (ops GPRC:$RA), InOperandList = (ops s64imm:$DISP, GPRC:$RB) in {
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let OutOperandList = (outs GPRC:$RA), InOperandList = (ins s64imm:$DISP, GPRC:$RB) in {
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def LDQ : MForm<0x29, 1, "ldq $RA,$DISP($RB)",
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[(set GPRC:$RA, (load (add GPRC:$RB, immSExt16:$DISP)))], s_ild>;
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def LDQr : MForm<0x29, 1, "ldq $RA,$DISP($RB)\t\t!gprellow",
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@ -445,7 +445,7 @@ def LDWUr : MForm<0x0C, 1, "ldwu $RA,$DISP($RB)\t\t!gprellow",
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}
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let OutOperandList = (ops), InOperandList = (ops GPRC:$RA, s64imm:$DISP, GPRC:$RB) in {
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let OutOperandList = (outs), InOperandList = (ins GPRC:$RA, s64imm:$DISP, GPRC:$RB) in {
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def STB : MForm<0x0E, 0, "stb $RA,$DISP($RB)",
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[(truncstorei8 GPRC:$RA, (add GPRC:$RB, immSExt16:$DISP))], s_ist>;
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def STBr : MForm<0x0E, 0, "stb $RA,$DISP($RB)\t\t!gprellow",
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@ -465,7 +465,7 @@ def STQr : MForm<0x2D, 0, "stq $RA,$DISP($RB)\t\t!gprellow",
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}
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//Load address
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let OutOperandList = (ops GPRC:$RA), InOperandList = (ops s64imm:$DISP, GPRC:$RB) in {
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let OutOperandList = (outs GPRC:$RA), InOperandList = (ins s64imm:$DISP, GPRC:$RB) in {
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def LDA : MForm<0x08, 0, "lda $RA,$DISP($RB)",
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[(set GPRC:$RA, (add GPRC:$RB, immSExt16:$DISP))], s_lda>;
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def LDAr : MForm<0x08, 0, "lda $RA,$DISP($RB)\t\t!gprellow",
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@ -476,25 +476,25 @@ def LDAHr : MForm<0x09, 0, "ldah $RA,$DISP($RB)\t\t!gprelhigh",
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[(set GPRC:$RA, (Alpha_gprelhi tglobaladdr:$DISP, GPRC:$RB))], s_lda>; //Load address high
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}
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let OutOperandList = (ops), InOperandList = (ops F4RC:$RA, s64imm:$DISP, GPRC:$RB) in {
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let OutOperandList = (outs), InOperandList = (ins F4RC:$RA, s64imm:$DISP, GPRC:$RB) in {
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def STS : MForm<0x26, 0, "sts $RA,$DISP($RB)",
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[(store F4RC:$RA, (add GPRC:$RB, immSExt16:$DISP))], s_fst>;
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def STSr : MForm<0x26, 0, "sts $RA,$DISP($RB)\t\t!gprellow",
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[(store F4RC:$RA, (Alpha_gprello tglobaladdr:$DISP, GPRC:$RB))], s_fst>;
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}
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let OutOperandList = (ops F4RC:$RA), InOperandList = (ops s64imm:$DISP, GPRC:$RB) in {
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let OutOperandList = (outs F4RC:$RA), InOperandList = (ins s64imm:$DISP, GPRC:$RB) in {
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def LDS : MForm<0x22, 1, "lds $RA,$DISP($RB)",
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[(set F4RC:$RA, (load (add GPRC:$RB, immSExt16:$DISP)))], s_fld>;
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def LDSr : MForm<0x22, 1, "lds $RA,$DISP($RB)\t\t!gprellow",
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[(set F4RC:$RA, (load (Alpha_gprello tglobaladdr:$DISP, GPRC:$RB)))], s_fld>;
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}
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let OutOperandList = (ops), InOperandList = (ops F8RC:$RA, s64imm:$DISP, GPRC:$RB) in {
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let OutOperandList = (outs), InOperandList = (ins F8RC:$RA, s64imm:$DISP, GPRC:$RB) in {
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def STT : MForm<0x27, 0, "stt $RA,$DISP($RB)",
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[(store F8RC:$RA, (add GPRC:$RB, immSExt16:$DISP))], s_fst>;
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def STTr : MForm<0x27, 0, "stt $RA,$DISP($RB)\t\t!gprellow",
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[(store F8RC:$RA, (Alpha_gprello tglobaladdr:$DISP, GPRC:$RB))], s_fst>;
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}
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let OutOperandList = (ops F8RC:$RA), InOperandList = (ops s64imm:$DISP, GPRC:$RB) in {
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let OutOperandList = (outs F8RC:$RA), InOperandList = (ins s64imm:$DISP, GPRC:$RB) in {
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def LDT : MForm<0x23, 1, "ldt $RA,$DISP($RB)",
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[(set F8RC:$RA, (load (add GPRC:$RB, immSExt16:$DISP)))], s_fld>;
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def LDTr : MForm<0x23, 1, "ldt $RA,$DISP($RB)\t\t!gprellow",
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@ -570,15 +570,15 @@ def : Pat<(truncstorei8 GPRC:$DATA, GPRC:$addr),
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//load address, rellocated gpdist form
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let OutOperandList = (ops GPRC:$RA),
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InOperandList = (ops s16imm:$DISP, GPRC:$RB, s16imm:$NUM),
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let OutOperandList = (outs GPRC:$RA),
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InOperandList = (ins s16imm:$DISP, GPRC:$RB, s16imm:$NUM),
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mayLoad = 1 in {
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def LDAg : MForm<0x08, 1, "lda $RA,0($RB)\t\t!gpdisp!$NUM", [], s_lda>; //Load address
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def LDAHg : MForm<0x09, 1, "ldah $RA,0($RB)\t\t!gpdisp!$NUM", [], s_lda>; //Load address
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}
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//Load quad, rellocated literal form
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let OutOperandList = (ops GPRC:$RA), InOperandList = (ops s64imm:$DISP, GPRC:$RB) in
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let OutOperandList = (outs GPRC:$RA), InOperandList = (ins s64imm:$DISP, GPRC:$RB) in
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def LDQl : MForm<0x29, 1, "ldq $RA,$DISP($RB)\t\t!literal",
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[(set GPRC:$RA, (Alpha_rellit tglobaladdr:$DISP, GPRC:$RB))], s_ild>;
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def : Pat<(Alpha_rellit texternalsym:$ext, GPRC:$RB),
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@ -591,8 +591,8 @@ let OutOperandList = (outs GPRC:$RR),
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def STQ_C : MForm<0x2F, 0, "stq_l $RA,$DISP($RB)", [], s_ist>;
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def STL_C : MForm<0x2E, 0, "stl_l $RA,$DISP($RB)", [], s_ist>;
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}
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let OutOperandList = (ops GPRC:$RA),
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InOperandList = (ops s64imm:$DISP, GPRC:$RB),
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let OutOperandList = (outs GPRC:$RA),
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InOperandList = (ins s64imm:$DISP, GPRC:$RB),
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mayLoad = 1 in {
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def LDQ_L : MForm<0x2B, 1, "ldq_l $RA,$DISP($RB)", [], s_ild>;
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def LDL_L : MForm<0x2A, 1, "ldl_l $RA,$DISP($RB)", [], s_ild>;
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@ -611,11 +611,11 @@ def : Pat<(membarrier (i64 imm), (i64 imm), (i64 imm), (i64 imm), (i64 imm)),
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//Floats
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let OutOperandList = (ops F4RC:$RC), InOperandList = (ops F4RC:$RB), Fa = 31 in
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let OutOperandList = (outs F4RC:$RC), InOperandList = (ins F4RC:$RB), Fa = 31 in
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def SQRTS : FPForm<0x14, 0x58B, "sqrts/su $RB,$RC",
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[(set F4RC:$RC, (fsqrt F4RC:$RB))], s_fsqrts>;
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let OutOperandList = (ops F4RC:$RC), InOperandList = (ops F4RC:$RA, F4RC:$RB) in {
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let OutOperandList = (outs F4RC:$RC), InOperandList = (ins F4RC:$RA, F4RC:$RB) in {
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def ADDS : FPForm<0x16, 0x580, "adds/su $RA,$RB,$RC",
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[(set F4RC:$RC, (fadd F4RC:$RA, F4RC:$RB))], s_fadd>;
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def SUBS : FPForm<0x16, 0x581, "subs/su $RA,$RB,$RC",
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@ -634,11 +634,11 @@ def CPYSNS : FPForm<0x17, 0x021, "cpysn $RA,$RB,$RC",
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//Doubles
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let OutOperandList = (ops F8RC:$RC), InOperandList = (ops F8RC:$RB), Fa = 31 in
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let OutOperandList = (outs F8RC:$RC), InOperandList = (ins F8RC:$RB), Fa = 31 in
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def SQRTT : FPForm<0x14, 0x5AB, "sqrtt/su $RB,$RC",
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[(set F8RC:$RC, (fsqrt F8RC:$RB))], s_fsqrtt>;
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let OutOperandList = (ops F8RC:$RC), InOperandList = (ops F8RC:$RA, F8RC:$RB) in {
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let OutOperandList = (outs F8RC:$RC), InOperandList = (ins F8RC:$RA, F8RC:$RB) in {
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def ADDT : FPForm<0x16, 0x5A0, "addt/su $RA,$RB,$RC",
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[(set F8RC:$RC, (fadd F8RC:$RA, F8RC:$RB))], s_fadd>;
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def SUBT : FPForm<0x16, 0x5A1, "subt/su $RA,$RB,$RC",
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@ -665,13 +665,13 @@ def CMPTUN : FPForm<0x16, 0x5A4, "cmptun/su $RA,$RB,$RC", [], s_fadd>;
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}
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//More CPYS forms:
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let OutOperandList = (ops F8RC:$RC), InOperandList = (ops F4RC:$RA, F8RC:$RB) in {
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let OutOperandList = (outs F8RC:$RC), InOperandList = (ins F4RC:$RA, F8RC:$RB) in {
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def CPYSTs : FPForm<0x17, 0x020, "cpys $RA,$RB,$RC",
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[(set F8RC:$RC, (fcopysign F8RC:$RB, F4RC:$RA))], s_fadd>;
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def CPYSNTs : FPForm<0x17, 0x021, "cpysn $RA,$RB,$RC",
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[(set F8RC:$RC, (fneg (fcopysign F8RC:$RB, F4RC:$RA)))], s_fadd>;
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}
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let OutOperandList = (ops F4RC:$RC), InOperandList = (ops F8RC:$RA, F4RC:$RB) in {
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let OutOperandList = (outs F4RC:$RC), InOperandList = (ins F8RC:$RA, F4RC:$RB) in {
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def CPYSSt : FPForm<0x17, 0x020, "cpys $RA,$RB,$RC",
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[(set F4RC:$RC, (fcopysign F4RC:$RB, F8RC:$RA))], s_fadd>;
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def CPYSESt : FPForm<0x17, 0x022, "cpyse $RA,$RB,$RC",[], s_fadd>; //Copy sign and exponent
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@ -680,7 +680,7 @@ def CPYSNSt : FPForm<0x17, 0x021, "cpysn $RA,$RB,$RC",
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}
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//conditional moves, floats
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let OutOperandList = (ops F4RC:$RDEST), InOperandList = (ops F4RC:$RFALSE, F4RC:$RTRUE, F8RC:$RCOND),
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let OutOperandList = (outs F4RC:$RDEST), InOperandList = (ins F4RC:$RFALSE, F4RC:$RTRUE, F8RC:$RCOND),
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isTwoAddress = 1 in {
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def FCMOVEQS : FPForm<0x17, 0x02A, "fcmoveq $RCOND,$RTRUE,$RDEST",[], s_fcmov>; //FCMOVE if = zero
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def FCMOVGES : FPForm<0x17, 0x02D, "fcmovge $RCOND,$RTRUE,$RDEST",[], s_fcmov>; //FCMOVE if >= zero
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@ -690,7 +690,7 @@ def FCMOVLTS : FPForm<0x17, 0x02C, "fcmovlt $RCOND,$RTRUE,$RDEST",[], s_fcmov>;
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def FCMOVNES : FPForm<0x17, 0x02B, "fcmovne $RCOND,$RTRUE,$RDEST",[], s_fcmov>; //FCMOVE if != zero
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}
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//conditional moves, doubles
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let OutOperandList = (ops F8RC:$RDEST), InOperandList = (ops F8RC:$RFALSE, F8RC:$RTRUE, F8RC:$RCOND),
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let OutOperandList = (outs F8RC:$RDEST), InOperandList = (ins F8RC:$RFALSE, F8RC:$RTRUE, F8RC:$RCOND),
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isTwoAddress = 1 in {
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def FCMOVEQT : FPForm<0x17, 0x02A, "fcmoveq $RCOND,$RTRUE,$RDEST", [], s_fcmov>;
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def FCMOVGET : FPForm<0x17, 0x02D, "fcmovge $RCOND,$RTRUE,$RDEST", [], s_fcmov>;
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@ -790,33 +790,33 @@ def : Pat<(select (setule F8RC:$RA, F8RC:$RB), F4RC:$st, F4RC:$sf),
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let OutOperandList = (ops GPRC:$RC), InOperandList = (ops F4RC:$RA), Fb = 31 in
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let OutOperandList = (outs GPRC:$RC), InOperandList = (ins F4RC:$RA), Fb = 31 in
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def FTOIS : FPForm<0x1C, 0x078, "ftois $RA,$RC",
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[(set GPRC:$RC, (bitconvert F4RC:$RA))], s_ftoi>; //Floating to integer move, S_floating
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let OutOperandList = (ops GPRC:$RC), InOperandList = (ops F8RC:$RA), Fb = 31 in
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let OutOperandList = (outs GPRC:$RC), InOperandList = (ins F8RC:$RA), Fb = 31 in
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def FTOIT : FPForm<0x1C, 0x070, "ftoit $RA,$RC",
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[(set GPRC:$RC, (bitconvert F8RC:$RA))], s_ftoi>; //Floating to integer move
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let OutOperandList = (ops F4RC:$RC), InOperandList = (ops GPRC:$RA), Fb = 31 in
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let OutOperandList = (outs F4RC:$RC), InOperandList = (ins GPRC:$RA), Fb = 31 in
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def ITOFS : FPForm<0x14, 0x004, "itofs $RA,$RC",
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[(set F4RC:$RC, (bitconvert GPRC:$RA))], s_itof>; //Integer to floating move, S_floating
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let OutOperandList = (ops F8RC:$RC), InOperandList = (ops GPRC:$RA), Fb = 31 in
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let OutOperandList = (outs F8RC:$RC), InOperandList = (ins GPRC:$RA), Fb = 31 in
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def ITOFT : FPForm<0x14, 0x024, "itoft $RA,$RC",
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||||
[(set F8RC:$RC, (bitconvert GPRC:$RA))], s_itof>; //Integer to floating move
|
||||
|
||||
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||||
let OutOperandList = (ops F4RC:$RC), InOperandList = (ops F8RC:$RB), Fa = 31 in
|
||||
let OutOperandList = (outs F4RC:$RC), InOperandList = (ins F8RC:$RB), Fa = 31 in
|
||||
def CVTQS : FPForm<0x16, 0x7BC, "cvtqs/sui $RB,$RC",
|
||||
[(set F4RC:$RC, (Alpha_cvtqs F8RC:$RB))], s_fadd>;
|
||||
let OutOperandList = (ops F8RC:$RC), InOperandList = (ops F8RC:$RB), Fa = 31 in
|
||||
let OutOperandList = (outs F8RC:$RC), InOperandList = (ins F8RC:$RB), Fa = 31 in
|
||||
def CVTQT : FPForm<0x16, 0x7BE, "cvtqt/sui $RB,$RC",
|
||||
[(set F8RC:$RC, (Alpha_cvtqt F8RC:$RB))], s_fadd>;
|
||||
let OutOperandList = (ops F8RC:$RC), InOperandList = (ops F8RC:$RB), Fa = 31 in
|
||||
let OutOperandList = (outs F8RC:$RC), InOperandList = (ins F8RC:$RB), Fa = 31 in
|
||||
def CVTTQ : FPForm<0x16, 0x52F, "cvttq/svc $RB,$RC",
|
||||
[(set F8RC:$RC, (Alpha_cvttq F8RC:$RB))], s_fadd>;
|
||||
let OutOperandList = (ops F8RC:$RC), InOperandList = (ops F4RC:$RB), Fa = 31 in
|
||||
let OutOperandList = (outs F8RC:$RC), InOperandList = (ins F4RC:$RB), Fa = 31 in
|
||||
def CVTST : FPForm<0x16, 0x6AC, "cvtst/s $RB,$RC",
|
||||
[(set F8RC:$RC, (fextend F4RC:$RB))], s_fadd>;
|
||||
let OutOperandList = (ops F4RC:$RC), InOperandList = (ops F8RC:$RB), Fa = 31 in
|
||||
let OutOperandList = (outs F4RC:$RC), InOperandList = (ins F8RC:$RB), Fa = 31 in
|
||||
def CVTTS : FPForm<0x16, 0x7AC, "cvtts/sui $RB,$RC",
|
||||
[(set F4RC:$RC, (fround F8RC:$RB))], s_fadd>;
|
||||
|
||||
@ -829,20 +829,20 @@ def : Pat<(select GPRC:$RC, F4RC:$st, F4RC:$sf),
|
||||
//Branching
|
||||
/////////////////////////////////////////////////////////
|
||||
class br_icc<bits<6> opc, string asmstr>
|
||||
: BFormN<opc, (ops u64imm:$opc, GPRC:$R, target:$dst),
|
||||
: BFormN<opc, (ins u64imm:$opc, GPRC:$R, target:$dst),
|
||||
!strconcat(asmstr, " $R,$dst"), s_icbr>;
|
||||
class br_fcc<bits<6> opc, string asmstr>
|
||||
: BFormN<opc, (ops u64imm:$opc, F8RC:$R, target:$dst),
|
||||
: BFormN<opc, (ins u64imm:$opc, F8RC:$R, target:$dst),
|
||||
!strconcat(asmstr, " $R,$dst"), s_fbr>;
|
||||
|
||||
let isBranch = 1, isTerminator = 1, hasCtrlDep = 1 in {
|
||||
let Ra = 31 in
|
||||
def BR : BFormD<0x30, "br $$31,$DISP", [(br bb:$DISP)], s_ubr>;
|
||||
|
||||
def COND_BRANCH_I : BFormN<0, (ops u64imm:$opc, GPRC:$R, target:$dst),
|
||||
def COND_BRANCH_I : BFormN<0, (ins u64imm:$opc, GPRC:$R, target:$dst),
|
||||
"{:comment} COND_BRANCH imm:$opc, GPRC:$R, bb:$dst",
|
||||
s_icbr>;
|
||||
def COND_BRANCH_F : BFormN<0, (ops u64imm:$opc, F8RC:$R, target:$dst),
|
||||
def COND_BRANCH_F : BFormN<0, (ins u64imm:$opc, F8RC:$R, target:$dst),
|
||||
"{:comment} COND_BRANCH imm:$opc, F8RC:$R, bb:$dst",
|
||||
s_fbr>;
|
||||
//Branches, int
|
||||
|
Loading…
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Reference in New Issue
Block a user