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Fix a bug where we were implicitly assuming that there would be at least
one terminator instruction in each basic block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11714 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -160,7 +160,7 @@ namespace {
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/// the virtual register slot specified by VirtReg. It then updates the RA
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/// data structures to indicate the fact that PhysReg is now available.
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///
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void spillVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
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void spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
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unsigned VirtReg, unsigned PhysReg);
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/// spillPhysReg - This method spills the specified physical register into
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@ -258,7 +258,7 @@ void RA::removePhysReg(unsigned PhysReg) {
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/// virtual register slot specified by VirtReg. It then updates the RA data
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/// structures to indicate the fact that PhysReg is now available.
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///
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void RA::spillVirtReg(MachineBasicBlock &MBB, MachineInstr *I,
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void RA::spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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unsigned VirtReg, unsigned PhysReg) {
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assert(VirtReg && "Spilling a physical register is illegal!"
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" Must not have appropriate kill for the register or use exists beyond"
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