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Mem2Reg does not need TargetData.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36444 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -555,7 +555,7 @@ void LICM::sink(Instruction &I) {
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if (AI) {
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std::vector<AllocaInst*> Allocas;
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Allocas.push_back(AI);
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PromoteMemToReg(Allocas, *ET, *DF, AA->getTargetData(), CurAST);
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PromoteMemToReg(Allocas, *ET, *DF, CurAST);
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}
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}
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}
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@ -736,7 +736,7 @@ void LICM::PromoteValuesInLoop() {
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PromotedAllocas.reserve(PromotedValues.size());
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for (unsigned i = 0, e = PromotedValues.size(); i != e; ++i)
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PromotedAllocas.push_back(PromotedValues[i].first);
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PromoteMemToReg(PromotedAllocas, *ET, *DF, AA->getTargetData(), CurAST);
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PromoteMemToReg(PromotedAllocas, *ET, *DF, CurAST);
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}
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/// FindPromotableValuesInLoop - Check the current loop for stores to definite
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@ -104,7 +104,6 @@ bool SROA::runOnFunction(Function &F) {
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bool SROA::performPromotion(Function &F) {
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std::vector<AllocaInst*> Allocas;
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const TargetData &TD = getAnalysis<TargetData>();
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ETForest &ET = getAnalysis<ETForest>();
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DominanceFrontier &DF = getAnalysis<DominanceFrontier>();
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@ -124,7 +123,7 @@ bool SROA::performPromotion(Function &F) {
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if (Allocas.empty()) break;
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PromoteMemToReg(Allocas, ET, DF, TD);
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PromoteMemToReg(Allocas, ET, DF);
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NumPromoted += Allocas.size();
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Changed = true;
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}
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@ -19,7 +19,6 @@
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#include "llvm/Analysis/Dominators.h"
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#include "llvm/Instructions.h"
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#include "llvm/Function.h"
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#include "llvm/Target/TargetData.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/Support/Compiler.h"
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using namespace llvm;
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@ -38,7 +37,6 @@ namespace {
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.addRequired<ETForest>();
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AU.addRequired<DominanceFrontier>();
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AU.addRequired<TargetData>();
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AU.setPreservesCFG();
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// This is a cluster of orthogonal Transforms
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AU.addPreserved<UnifyFunctionExitNodes>();
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@ -54,7 +52,6 @@ namespace {
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bool PromotePass::runOnFunction(Function &F) {
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std::vector<AllocaInst*> Allocas;
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const TargetData &TD = getAnalysis<TargetData>();
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BasicBlock &BB = F.getEntryBlock(); // Get the entry node for the function
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@ -75,7 +72,7 @@ bool PromotePass::runOnFunction(Function &F) {
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if (Allocas.empty()) break;
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PromoteMemToReg(Allocas, ET, DF, TD);
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PromoteMemToReg(Allocas, ET, DF);
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NumPromoted += Allocas.size();
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Changed = true;
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}
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@ -90,7 +90,6 @@ namespace {
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SmallVector<AllocaInst*, 16> &RetryList;
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ETForest &ET;
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DominanceFrontier &DF;
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const TargetData &TD;
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/// AST - An AliasSetTracker object to update. If null, don't update it.
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///
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@ -128,9 +127,8 @@ namespace {
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public:
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PromoteMem2Reg(const std::vector<AllocaInst*> &A,
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SmallVector<AllocaInst*, 16> &Retry, ETForest &et,
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DominanceFrontier &df, const TargetData &td,
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AliasSetTracker *ast)
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: Allocas(A), RetryList(Retry), ET(et), DF(df), TD(td), AST(ast) {}
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DominanceFrontier &df, AliasSetTracker *ast)
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: Allocas(A), RetryList(Retry), ET(et), DF(df), AST(ast) {}
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void run();
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@ -806,12 +804,12 @@ void PromoteMem2Reg::RenamePass(BasicBlock *BB, BasicBlock *Pred,
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///
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void llvm::PromoteMemToReg(const std::vector<AllocaInst*> &Allocas,
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ETForest &ET, DominanceFrontier &DF,
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const TargetData &TD, AliasSetTracker *AST) {
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AliasSetTracker *AST) {
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// If there is nothing to do, bail out...
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if (Allocas.empty()) return;
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SmallVector<AllocaInst*, 16> RetryList;
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PromoteMem2Reg(Allocas, RetryList, ET, DF, TD, AST).run();
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PromoteMem2Reg(Allocas, RetryList, ET, DF, AST).run();
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// PromoteMem2Reg may not have been able to promote all of the allocas in one
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// pass, run it again if needed.
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@ -829,7 +827,7 @@ void llvm::PromoteMemToReg(const std::vector<AllocaInst*> &Allocas,
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NewAllocas.assign(RetryList.begin(), RetryList.end());
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RetryList.clear();
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PromoteMem2Reg(NewAllocas, RetryList, ET, DF, TD, AST).run();
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PromoteMem2Reg(NewAllocas, RetryList, ET, DF, AST).run();
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NewAllocas.clear();
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}
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}
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