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https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-18 12:29:21 +00:00
This changes the PromoteMemToReg function to create "pruned" SSA form, not
"minimal" SSA form (in other words, it doesn't insert dead PHIs). This speeds up the mem2reg pass very significantly because it doesn't have to do a lot of frivolous work in many common cases. In the 252.eon function I have been playing with, this doesn't even insert the 120 PHI nodes that it used to which were trivially dead (in the process of promoting 356 alloca instructions overall). This speeds up the mem2reg pass from 1.2459s to 0.1284s. More significantly, the DCE pass used to take 2.4138s to remove the 120 dead PHI nodes that mem2reg constructed, now it takes 0.0134s (which is the time to scan the function and decide that there is nothing dead). So overall, on this one function, we speed things up a total of 3.5179s, which is a 24.8x speedup! :) This change is tested by the Mem2Reg/2003-10-05-DeadPHIInsertion.ll test, which now passes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8884 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -4,7 +4,8 @@
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// alloca instructions which only have loads and stores as uses. An alloca is
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// alloca instructions which only have loads and stores as uses. An alloca is
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// transformed by using dominator frontiers to place PHI nodes, then traversing
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// transformed by using dominator frontiers to place PHI nodes, then traversing
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// the function in depth-first order to rewrite loads and stores as appropriate.
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// the function in depth-first order to rewrite loads and stores as appropriate.
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// This is just the standard SSA construction algorithm.
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// This is just the standard SSA construction algorithm to construct "pruned"
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// SSA form.
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//
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//
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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@ -42,6 +43,7 @@ namespace {
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struct PromoteMem2Reg {
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struct PromoteMem2Reg {
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// Allocas - The alloca instructions being promoted
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// Allocas - The alloca instructions being promoted
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std::vector<AllocaInst*> Allocas;
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std::vector<AllocaInst*> Allocas;
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DominatorTree &DT;
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DominanceFrontier &DF;
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DominanceFrontier &DF;
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const TargetData &TD;
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const TargetData &TD;
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@ -55,29 +57,33 @@ namespace {
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std::set<BasicBlock*> Visited;
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std::set<BasicBlock*> Visited;
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public:
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public:
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PromoteMem2Reg(const std::vector<AllocaInst*> &A, DominanceFrontier &df,
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PromoteMem2Reg(const std::vector<AllocaInst*> &A, DominatorTree &dt,
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const TargetData &td) : Allocas(A), DF(df), TD(td) {}
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DominanceFrontier &df, const TargetData &td)
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: Allocas(A), DT(dt), DF(df), TD(td) {}
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void run();
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void run();
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private:
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private:
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void MarkDominatingPHILive(BasicBlock *BB, unsigned AllocaNum,
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std::set<PHINode*> &DeadPHINodes);
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void PromoteLocallyUsedAlloca(AllocaInst *AI);
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void PromoteLocallyUsedAlloca(AllocaInst *AI);
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void RenamePass(BasicBlock *BB, BasicBlock *Pred,
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void RenamePass(BasicBlock *BB, BasicBlock *Pred,
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std::vector<Value*> &IncVals);
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std::vector<Value*> &IncVals);
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bool QueuePhiNode(BasicBlock *BB, unsigned AllocaIdx, unsigned &Version);
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bool QueuePhiNode(BasicBlock *BB, unsigned AllocaIdx, unsigned &Version,
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std::set<PHINode*> &InsertedPHINodes);
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};
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};
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} // end of anonymous namespace
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} // end of anonymous namespace
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void PromoteMem2Reg::run() {
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void PromoteMem2Reg::run() {
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Function &F = *DF.getRoot()->getParent();
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Function &F = *DF.getRoot()->getParent();
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for (unsigned i = 0; i != Allocas.size(); ++i) {
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for (unsigned AllocaNum = 0; AllocaNum != Allocas.size(); ++AllocaNum) {
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AllocaInst *AI = Allocas[i];
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AllocaInst *AI = Allocas[AllocaNum];
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assert(isAllocaPromotable(AI, TD) &&
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assert(isAllocaPromotable(AI, TD) &&
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"Cannot promote non-promotable alloca!");
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"Cannot promote non-promotable alloca!");
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assert(Allocas[i]->getParent()->getParent() == &F &&
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assert(AI->getParent()->getParent() == &F &&
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"All allocas should be in the same function, which is same as DF!");
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"All allocas should be in the same function, which is same as DF!");
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if (AI->use_empty()) {
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if (AI->use_empty()) {
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@ -85,15 +91,17 @@ void PromoteMem2Reg::run() {
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AI->getParent()->getInstList().erase(AI);
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AI->getParent()->getInstList().erase(AI);
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// Remove the alloca from the Allocas list, since it has been processed
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// Remove the alloca from the Allocas list, since it has been processed
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Allocas[i] = Allocas.back();
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Allocas[AllocaNum] = Allocas.back();
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Allocas.pop_back();
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Allocas.pop_back();
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--i;
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--AllocaNum;
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continue;
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continue;
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}
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}
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// Calculate the set of write-locations for each alloca. This is analogous
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// Calculate the set of read and write-locations for each alloca. This is
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// to counting the number of 'redefinitions' of each variable.
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// analogous to counting the number of 'uses' and 'definitions' of each
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// variable.
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std::vector<BasicBlock*> DefiningBlocks;
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std::vector<BasicBlock*> DefiningBlocks;
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std::vector<BasicBlock*> UsingBlocks;
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BasicBlock *OnlyBlock = 0;
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BasicBlock *OnlyBlock = 0;
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bool OnlyUsedInOneBlock = true;
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bool OnlyUsedInOneBlock = true;
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@ -106,6 +114,9 @@ void PromoteMem2Reg::run() {
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if (StoreInst *SI = dyn_cast<StoreInst>(User)) {
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if (StoreInst *SI = dyn_cast<StoreInst>(User)) {
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// Remember the basic blocks which define new values for the alloca
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// Remember the basic blocks which define new values for the alloca
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DefiningBlocks.push_back(SI->getParent());
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DefiningBlocks.push_back(SI->getParent());
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} else {
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// Otherwise it must be a load instruction, keep track of variable reads
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UsingBlocks.push_back(cast<LoadInst>(User)->getParent());
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}
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}
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if (OnlyUsedInOneBlock) {
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if (OnlyUsedInOneBlock) {
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@ -122,22 +133,17 @@ void PromoteMem2Reg::run() {
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PromoteLocallyUsedAlloca(AI);
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PromoteLocallyUsedAlloca(AI);
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// Remove the alloca from the Allocas list, since it has been processed
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// Remove the alloca from the Allocas list, since it has been processed
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Allocas[i] = Allocas.back();
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Allocas[AllocaNum] = Allocas.back();
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Allocas.pop_back();
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Allocas.pop_back();
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--i;
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--AllocaNum;
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continue;
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continue;
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}
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}
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AllocaLookup[Allocas[i]] = i;
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// PhiNodeBlocks - A list of blocks that phi nodes have been inserted for
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// this alloca.
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std::vector<BasicBlock*> PhiNodeBlocks;
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// Compute the locations where PhiNodes need to be inserted. Look at the
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// Compute the locations where PhiNodes need to be inserted. Look at the
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// dominance frontier of EACH basic-block we have a write in.
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// dominance frontier of EACH basic-block we have a write in.
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//
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//
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unsigned CurrentVersion = 0;
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unsigned CurrentVersion = 0;
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std::set<PHINode*> InsertedPHINodes;
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while (!DefiningBlocks.empty()) {
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while (!DefiningBlocks.empty()) {
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BasicBlock *BB = DefiningBlocks.back();
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BasicBlock *BB = DefiningBlocks.back();
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DefiningBlocks.pop_back();
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DefiningBlocks.pop_back();
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@ -148,10 +154,45 @@ void PromoteMem2Reg::run() {
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const DominanceFrontier::DomSetType &S = it->second;
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const DominanceFrontier::DomSetType &S = it->second;
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for (DominanceFrontier::DomSetType::iterator P = S.begin(),PE = S.end();
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for (DominanceFrontier::DomSetType::iterator P = S.begin(),PE = S.end();
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P != PE; ++P)
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P != PE; ++P)
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if (QueuePhiNode(*P, i, CurrentVersion))
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if (QueuePhiNode(*P, AllocaNum, CurrentVersion, InsertedPHINodes))
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DefiningBlocks.push_back(*P);
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DefiningBlocks.push_back(*P);
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}
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}
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}
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}
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// Now that we have inserted PHI nodes along the Iterated Dominance Frontier
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// of the writes to the variable, scan through the reads of the variable,
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// marking PHI nodes which are actually necessary as alive (by removing them
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// from the InsertedPHINodes set). This is not perfect: there may PHI
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// marked alive because of loads which are dominated by stores, but there
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// will be no unmarked PHI nodes which are actually used.
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//
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for (unsigned i = 0, e = UsingBlocks.size(); i != e; ++i)
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MarkDominatingPHILive(UsingBlocks[i], AllocaNum, InsertedPHINodes);
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UsingBlocks.clear();
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// If there are any PHI nodes which are now known to be dead, remove them!
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for (std::set<PHINode*>::iterator I = InsertedPHINodes.begin(),
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E = InsertedPHINodes.end(); I != E; ++I) {
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PHINode *PN = *I;
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std::vector<PHINode*> &BBPNs = NewPhiNodes[PN->getParent()];
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BBPNs[AllocaNum] = 0;
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// Check to see if we just removed the last inserted PHI node from this
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// basic block. If so, remove the entry for the basic block.
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bool HasOtherPHIs = false;
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for (unsigned i = 0, e = BBPNs.size(); i != e; ++i)
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if (BBPNs[i]) {
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HasOtherPHIs = true;
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break;
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}
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if (!HasOtherPHIs)
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NewPhiNodes.erase(PN->getParent());
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PN->getParent()->getInstList().erase(PN);
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}
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// Keep the reverse mapping of the 'Allocas' array.
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AllocaLookup[Allocas[AllocaNum]] = AllocaNum;
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}
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}
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if (Allocas.empty())
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if (Allocas.empty())
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@ -215,7 +256,7 @@ void PromoteMem2Reg::run() {
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// Now we loop through all BB's which have entries in FirstPHI and remove
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// Now we loop through all BB's which have entries in FirstPHI and remove
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// them from the Preds list.
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// them from the Preds list.
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for (unsigned i = 0, e = FirstPHI->getNumIncomingValues(); i != e; ++i) {
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for (unsigned i = 0, e = FirstPHI->getNumIncomingValues(); i != e; ++i) {
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// Do a log(n) search of teh Preds list for the entry we want.
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// Do a log(n) search of the Preds list for the entry we want.
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std::vector<BasicBlock*>::iterator EntIt =
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std::vector<BasicBlock*>::iterator EntIt =
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std::lower_bound(Preds.begin(), Preds.end(),
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std::lower_bound(Preds.begin(), Preds.end(),
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FirstPHI->getIncomingBlock(i));
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FirstPHI->getIncomingBlock(i));
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@ -238,6 +279,43 @@ void PromoteMem2Reg::run() {
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}
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}
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}
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}
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// MarkDominatingPHILive - Mem2Reg wants to construct "pruned" SSA form, not
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// "minimal" SSA form. To do this, it inserts all of the PHI nodes on the IDF
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// as usual (inserting the PHI nodes in the DeadPHINodes set), then processes
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// each read of the variable. For each block that reads the variable, this
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// function is called, which removes used PHI nodes from the DeadPHINodes set.
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// After all of the reads have been processed, any PHI nodes left in the
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// DeadPHINodes set are removed.
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//
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void PromoteMem2Reg::MarkDominatingPHILive(BasicBlock *BB, unsigned AllocaNum,
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std::set<PHINode*> &DeadPHINodes) {
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// Scan the immediate dominators of this block looking for a block which has a
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// PHI node for Alloca num. If we find it, mark the PHI node as being alive!
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for (DominatorTree::Node *N = DT[BB]; N; N = N->getIDom()) {
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BasicBlock *DomBB = N->getBlock();
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std::map<BasicBlock*, std::vector<PHINode*> >::iterator
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I = NewPhiNodes.find(DomBB);
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if (I != NewPhiNodes.end() && I->second[AllocaNum]) {
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// Ok, we found an inserted PHI node which dominates this value.
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PHINode *DominatingPHI = I->second[AllocaNum];
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// Find out if we previously thought it was dead.
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std::set<PHINode*>::iterator DPNI = DeadPHINodes.find(DominatingPHI);
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if (DPNI != DeadPHINodes.end()) {
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// Ok, until now, we thought this PHI node was dead. Mark it as being
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// alive/needed.
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DeadPHINodes.erase(DPNI);
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// Now that we have marked the PHI node alive, also mark any PHI nodes
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// which it might use as being alive as well.
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for (pred_iterator PI = pred_begin(DomBB), PE = pred_end(DomBB);
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PI != PE; ++PI)
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MarkDominatingPHILive(*PI, AllocaNum, DeadPHINodes);
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}
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}
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}
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}
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// PromoteLocallyUsedAlloca - Many allocas are only used within a single basic
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// PromoteLocallyUsedAlloca - Many allocas are only used within a single basic
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// block. If this is the case, avoid traversing the CFG and inserting a lot of
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// block. If this is the case, avoid traversing the CFG and inserting a lot of
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// potentially useless PHI nodes by just performing a single linear pass over
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// potentially useless PHI nodes by just performing a single linear pass over
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@ -278,7 +356,8 @@ void PromoteMem2Reg::PromoteLocallyUsedAlloca(AllocaInst *AI) {
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// Alloca returns true if there wasn't already a phi-node for that variable
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// Alloca returns true if there wasn't already a phi-node for that variable
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//
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//
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bool PromoteMem2Reg::QueuePhiNode(BasicBlock *BB, unsigned AllocaNo,
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bool PromoteMem2Reg::QueuePhiNode(BasicBlock *BB, unsigned AllocaNo,
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unsigned &Version) {
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unsigned &Version,
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std::set<PHINode*> &InsertedPHINodes) {
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// Look up the basic-block in question
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// Look up the basic-block in question
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std::vector<PHINode*> &BBPNs = NewPhiNodes[BB];
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std::vector<PHINode*> &BBPNs = NewPhiNodes[BB];
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if (BBPNs.empty()) BBPNs.resize(Allocas.size());
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if (BBPNs.empty()) BBPNs.resize(Allocas.size());
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BBPNs[AllocaNo] = new PHINode(Allocas[AllocaNo]->getAllocatedType(),
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BBPNs[AllocaNo] = new PHINode(Allocas[AllocaNo]->getAllocatedType(),
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Allocas[AllocaNo]->getName() + "." +
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Allocas[AllocaNo]->getName() + "." +
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utostr(Version++), BB->begin());
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utostr(Version++), BB->begin());
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InsertedPHINodes.insert(BBPNs[AllocaNo]);
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return true;
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return true;
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}
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}
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// RenamePass - Recursively traverse the CFG of the function, renaming loads and
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// stores to the allocas which we are promoting. IncomingVals indicates what
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// value each Alloca contains on exit from the predecessor block Pred.
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//
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void PromoteMem2Reg::RenamePass(BasicBlock *BB, BasicBlock *Pred,
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void PromoteMem2Reg::RenamePass(BasicBlock *BB, BasicBlock *Pred,
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std::vector<Value*> &IncomingVals) {
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std::vector<Value*> &IncomingVals) {
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}
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}
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}
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}
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// Recurse to our successors
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// Recurse to our successors.
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TerminatorInst *TI = BB->getTerminator();
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TerminatorInst *TI = BB->getTerminator();
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for (unsigned i = 0; i != TI->getNumSuccessors(); i++) {
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for (unsigned i = 0; i != TI->getNumSuccessors(); i++) {
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std::vector<Value*> OutgoingVals(IncomingVals);
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std::vector<Value*> OutgoingVals(IncomingVals);
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@ -365,5 +450,5 @@ void PromoteMemToReg(const std::vector<AllocaInst*> &Allocas,
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const TargetData &TD) {
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const TargetData &TD) {
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// If there is nothing to do, bail out...
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// If there is nothing to do, bail out...
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if (Allocas.empty()) return;
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if (Allocas.empty()) return;
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PromoteMem2Reg(Allocas, DF, TD).run();
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PromoteMem2Reg(Allocas, DT, DF, TD).run();
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}
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}
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