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handle a common case generated by the uint64 -> FP code path better

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21888 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2005-05-12 06:27:02 +00:00
parent e131e5b81e
commit 6980d8295f
1 changed files with 17 additions and 1 deletions
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18
lib/CodeGen/SelectionDAG/SelectionDAG.cpp
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@ -1299,7 +1299,7 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
N2.getOperand(0) == N3)
return getNode(ISD::FABS, VT, N3);
}
// select (setlt X, 0), A, 0 -> and (sra X, size(X)-1, A)
// select (setlt X, 0), A, 0 -> and (sra X, size(X)-1), A
if (ConstantSDNode *CN =
dyn_cast<ConstantSDNode>(SetCC->getOperand(1)))
if (CN->getValue() == 0 && N3C && N3C->getValue() == 0)
@ -1307,6 +1307,22 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
MVT::ValueType XType = SetCC->getOperand(0).getValueType();
MVT::ValueType AType = N2.getValueType();
if (XType >= AType) {
// and (sra X, size(X)-1, A) -> "and (srl X, C2), A" iff A is a
// single-bit constant. FIXME: remove once the dag combiner
// exists.
if (ConstantSDNode *AC = dyn_cast<ConstantSDNode>(N2))
if ((AC->getValue() & (AC->getValue()-1)) == 0) {
unsigned ShCtV = ExactLog2(AC->getValue());
ShCtV = MVT::getSizeInBits(XType)-ShCtV-1;
SDOperand ShCt = getConstant(ShCtV, TLI.getShiftAmountTy());
SDOperand Shift = getNode(ISD::SRL, XType,
SetCC->getOperand(0), ShCt);
if (XType > AType)
Shift = getNode(ISD::TRUNCATE, AType, Shift);
return getNode(ISD::AND, AType, Shift, N2);
}
SDOperand Shift = getNode(ISD::SRA, XType, SetCC->getOperand(0),
getConstant(MVT::getSizeInBits(XType)-1,
TLI.getShiftAmountTy()));