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handle a common case generated by the uint64 -> FP code path better
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21888 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1299,7 +1299,7 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
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N2.getOperand(0) == N3)
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return getNode(ISD::FABS, VT, N3);
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}
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// select (setlt X, 0), A, 0 -> and (sra X, size(X)-1, A)
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// select (setlt X, 0), A, 0 -> and (sra X, size(X)-1), A
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if (ConstantSDNode *CN =
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dyn_cast<ConstantSDNode>(SetCC->getOperand(1)))
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if (CN->getValue() == 0 && N3C && N3C->getValue() == 0)
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@ -1307,6 +1307,22 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
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MVT::ValueType XType = SetCC->getOperand(0).getValueType();
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MVT::ValueType AType = N2.getValueType();
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if (XType >= AType) {
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// and (sra X, size(X)-1, A) -> "and (srl X, C2), A" iff A is a
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// single-bit constant. FIXME: remove once the dag combiner
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// exists.
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if (ConstantSDNode *AC = dyn_cast<ConstantSDNode>(N2))
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if ((AC->getValue() & (AC->getValue()-1)) == 0) {
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unsigned ShCtV = ExactLog2(AC->getValue());
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ShCtV = MVT::getSizeInBits(XType)-ShCtV-1;
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SDOperand ShCt = getConstant(ShCtV, TLI.getShiftAmountTy());
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SDOperand Shift = getNode(ISD::SRL, XType,
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SetCC->getOperand(0), ShCt);
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if (XType > AType)
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Shift = getNode(ISD::TRUNCATE, AType, Shift);
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return getNode(ISD::AND, AType, Shift, N2);
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}
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SDOperand Shift = getNode(ISD::SRA, XType, SetCC->getOperand(0),
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getConstant(MVT::getSizeInBits(XType)-1,
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TLI.getShiftAmountTy()));
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