6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-08-19 19:29:31 +00:00
Code Issues Projects Releases Wiki Activity

* Fix file header to use tablegen emacs mode instead of c++

Browse Source 
* Wrap long line to 80 cols


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15630 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Misha Brukman 2004-08-10 21:24:44 +00:00
parent 36b689009d
commit 698fbd5b94
1 changed files with 3 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
lib/Target/PowerPC/PowerPC.td
View File

@ -1,4 +1,4 @@
//===- PowerPC.td - Describe the PowerPC Target Machine ---------*- C++ -*-===//
//===- PowerPC.td - Describe the PowerPC Target Machine ----*- tablegen -*-===//
//
// The LLVM Compiler Infrastructure
//
@ -24,7 +24,8 @@ include "PowerPCInstrInfo.td"
def PowerPCInstrInfo : InstrInfo {
let PHIInst = PHI;
let TSFlagsFields = ["ArgCount", "Arg0Type", "Arg1Type", "Arg2Type", "Arg3Type", "Arg4Type", "VMX", "PPC64"];
let TSFlagsFields = ["ArgCount", "Arg0Type", "Arg1Type", "Arg2Type",
"Arg3Type", "Arg4Type", "VMX", "PPC64"];
let TSFlagsShifts = [ 0, 3, 8, 13, 18, 23, 28, 29 ];
}