6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-08-26 23:29:22 +00:00
Code Issues Projects Releases Wiki Activity

ARM range checking for so_imm operands in assembly parsing.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135489 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2011-07-19 16:50:30 +00:00
parent f51bb7cef8
commit 6bc1dbc376
2 changed files with 15 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
lib/Target/ARM/ARMInstrInfo.td
View File

@ -443,10 +443,12 @@ def shift_so_reg : Operand<i32>, // reg reg imm
// so_imm - Match a 32-bit shifter_operand immediate operand, which is an
// 8-bit immediate rotated by an arbitrary number of bits.
def SOImmAsmOperand: AsmOperandClass { let Name = "ARMSOImm"; }
def so_imm : Operand<i32>, ImmLeaf<i32, [{
return ARM_AM::getSOImmVal(Imm) != -1;
}]> {
let EncoderMethod = "getSOImmOpValue";
let ParserMatchClass = SOImmAsmOperand;
}
// Break so_imm's up into two pieces. This handles immediates with up to 16

13
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
View File

@ -407,6 +407,14 @@ public:
int64_t Value = CE->getValue();
return Value >= 0 && Value < 65536;
}
bool isARMSOImm() const {
if (Kind != Immediate)
return false;
const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
if (!CE) return false;
int64_t Value = CE->getValue();
return ARM_AM::getSOImmVal(Value) != -1;
}
bool isT2SOImm() const {
if (Kind != Immediate)
return false;
@ -613,6 +621,11 @@ public:
addExpr(Inst, getImm());
}
void addARMSOImmOperands(MCInst &Inst, unsigned N) const {
assert(N == 1 && "Invalid number of operands!");
addExpr(Inst, getImm());
}
void addT2SOImmOperands(MCInst &Inst, unsigned N) const {
assert(N == 1 && "Invalid number of operands!");
addExpr(Inst, getImm());