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Allow saving and restoring of double and float registers.
Allow copying of float registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14445 91177308-0d34-0410-b5e6-96231b3b80d8
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c53105c749
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@ -30,10 +30,18 @@ int SparcV8RegisterInfo::storeRegToStackSlot(
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unsigned SrcReg, int FrameIdx,
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const TargetRegisterClass *RC) const
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{
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assert (RC == SparcV8::IntRegsRegisterClass
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&& "Can only store 32-bit values to stack slots");
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// On the order of operands here: think "[FrameIdx + 0] = SrcReg".
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BuildMI (MBB, I, V8::ST, 3).addFrameIndex (FrameIdx).addSImm (0).addReg (SrcReg);
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if (RC == SparcV8::IntRegsRegisterClass)
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BuildMI (MBB, I, V8::ST, 3).addFrameIndex (FrameIdx).addSImm (0)
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.addReg (SrcReg);
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else if (RC == SparcV8::FPRegsRegisterClass)
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BuildMI (MBB, I, V8::STFri, 3).addFrameIndex (FrameIdx).addSImm (0)
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.addReg (SrcReg);
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else if (RC == SparcV8::DFPRegsRegisterClass)
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BuildMI (MBB, I, V8::STDFri, 3).addFrameIndex (FrameIdx).addSImm (0)
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.addReg (SrcReg);
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else
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assert (0 && "Can't store this register to stack slot");
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return 1;
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}
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@ -43,9 +51,16 @@ int SparcV8RegisterInfo::loadRegFromStackSlot(
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unsigned DestReg, int FrameIdx,
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const TargetRegisterClass *RC) const
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{
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assert (RC == SparcV8::IntRegsRegisterClass
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&& "Can only load 32-bit registers from stack slots");
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BuildMI (MBB, I, V8::LD, 2, DestReg).addFrameIndex (FrameIdx).addSImm (0);
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if (RC == SparcV8::IntRegsRegisterClass)
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BuildMI (MBB, I, V8::LD, 2, DestReg).addFrameIndex (FrameIdx).addSImm (0);
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else if (RC == SparcV8::FPRegsRegisterClass)
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BuildMI (MBB, I, V8::LDFri, 2, DestReg).addFrameIndex (FrameIdx)
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.addSImm (0);
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else if (RC == SparcV8::DFPRegsRegisterClass)
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BuildMI (MBB, I, V8::LDDFri, 2, DestReg).addFrameIndex (FrameIdx)
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.addSImm (0);
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else
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assert (0 && "Can't load this register from stack slot");
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return 1;
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}
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@ -53,9 +68,12 @@ int SparcV8RegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I,
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unsigned DestReg, unsigned SrcReg,
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const TargetRegisterClass *RC) const {
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assert (RC == SparcV8::IntRegsRegisterClass
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&& "Can only copy 32-bit registers");
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BuildMI (MBB, I, V8::ORrr, 2, DestReg).addReg (V8::G0).addReg (SrcReg);
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if (RC == SparcV8::IntRegsRegisterClass)
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BuildMI (MBB, I, V8::ORrr, 2, DestReg).addReg (V8::G0).addReg (SrcReg);
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else if (RC == SparcV8::FPRegsRegisterClass)
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BuildMI (MBB, I, V8::FMOVS, 1, DestReg).addReg (SrcReg);
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else
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assert (0 && "Can't copy this register");
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return 1;
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}
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@ -30,10 +30,18 @@ int SparcV8RegisterInfo::storeRegToStackSlot(
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unsigned SrcReg, int FrameIdx,
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const TargetRegisterClass *RC) const
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{
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assert (RC == SparcV8::IntRegsRegisterClass
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&& "Can only store 32-bit values to stack slots");
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// On the order of operands here: think "[FrameIdx + 0] = SrcReg".
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BuildMI (MBB, I, V8::ST, 3).addFrameIndex (FrameIdx).addSImm (0).addReg (SrcReg);
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if (RC == SparcV8::IntRegsRegisterClass)
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BuildMI (MBB, I, V8::ST, 3).addFrameIndex (FrameIdx).addSImm (0)
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.addReg (SrcReg);
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else if (RC == SparcV8::FPRegsRegisterClass)
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BuildMI (MBB, I, V8::STFri, 3).addFrameIndex (FrameIdx).addSImm (0)
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.addReg (SrcReg);
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else if (RC == SparcV8::DFPRegsRegisterClass)
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BuildMI (MBB, I, V8::STDFri, 3).addFrameIndex (FrameIdx).addSImm (0)
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.addReg (SrcReg);
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else
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assert (0 && "Can't store this register to stack slot");
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return 1;
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}
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@ -43,9 +51,16 @@ int SparcV8RegisterInfo::loadRegFromStackSlot(
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unsigned DestReg, int FrameIdx,
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const TargetRegisterClass *RC) const
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{
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assert (RC == SparcV8::IntRegsRegisterClass
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&& "Can only load 32-bit registers from stack slots");
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BuildMI (MBB, I, V8::LD, 2, DestReg).addFrameIndex (FrameIdx).addSImm (0);
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if (RC == SparcV8::IntRegsRegisterClass)
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BuildMI (MBB, I, V8::LD, 2, DestReg).addFrameIndex (FrameIdx).addSImm (0);
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else if (RC == SparcV8::FPRegsRegisterClass)
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BuildMI (MBB, I, V8::LDFri, 2, DestReg).addFrameIndex (FrameIdx)
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.addSImm (0);
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else if (RC == SparcV8::DFPRegsRegisterClass)
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BuildMI (MBB, I, V8::LDDFri, 2, DestReg).addFrameIndex (FrameIdx)
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.addSImm (0);
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else
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assert (0 && "Can't load this register from stack slot");
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return 1;
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}
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@ -53,9 +68,12 @@ int SparcV8RegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I,
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unsigned DestReg, unsigned SrcReg,
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const TargetRegisterClass *RC) const {
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assert (RC == SparcV8::IntRegsRegisterClass
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&& "Can only copy 32-bit registers");
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BuildMI (MBB, I, V8::ORrr, 2, DestReg).addReg (V8::G0).addReg (SrcReg);
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if (RC == SparcV8::IntRegsRegisterClass)
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BuildMI (MBB, I, V8::ORrr, 2, DestReg).addReg (V8::G0).addReg (SrcReg);
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else if (RC == SparcV8::FPRegsRegisterClass)
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BuildMI (MBB, I, V8::FMOVS, 1, DestReg).addReg (SrcReg);
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else
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assert (0 && "Can't copy this register");
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return 1;
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}
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